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参数资料
| 型号： | LE25CA322TT |
| 厂商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分类： | PROM |
| 英文描述： | 4K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封装： | 0.150 INCH, MSOP-8 |
| 文件页数： | 3/14页 |
| 文件大小： | 217K |
| 代理商： | LE25CA322TT |
LE25CA322
No.NA1678-11/14
BP0, BP1 (bits2, 3)
Block Protect Settings
Block protect BP0 and BP1 are status register bits that can be rewritten, and the memory space to be protected can be
set depending on these bits. For the setting conditions, refer to “Table 3 Protect Level Setting Conditions.”
Table 3 Protect Level Setting Conditions
Status Register Bits
Protection Block (Level)
BP1
BP0
Protected Area
0 (Whole area unprotected)
0
None
1 (Upper 1/4 area protected)
0
1
0C00h to 0FFFh
2 (Upper 1/2 area protected)
1
0
0800h to 0FFFh
3 (Whole area protected)
1
0000h to 0FFFh
SRWP (bit7)
Status Register Write Protect Settings
Status register write protect SRWP is the bit for protecting the status registers, and its information can be rewritten.
When SRWP is “1” and the logic level of the WP pin is low, the status register write command is ignored, and status
registers BP0, BP1, BP2, and SRWP are protected. When the logic level of the WP pin is high, the status registers are
not protected regardless of the SRWP state. The SRWP setting conditions are shown in “Table 4 SRWP Setting
Conditions.”
Table 4 SRWP Setting Conditions
WP Pin
SRWP
Mode
Status Register
Protected Area
Unprotected Area
1
0
1
Software protected
(SPM)
Unprotected
Protected
Unprotected
0
1
Hardware protected
(HPM)
Protected
Unprotected
Bit4, bit5, and bit6 are reserved bits, and have no significance.
3. Write Enable (WREN)
Before performing any of the operations listed below, the device must be placed in the write enable state. Operation is
the same as for setting status register WEN to “1”, and the state is enabled by inputting the write enable command.
“Figure 7 Write Enable” shows the timing waveforms when the write enable operation is performed. The write enable
command consists only of the first bus cycle, and it is initiated by inputting (06h).
Write (WRITE)
Status register write (WRSR)
4. Write Disable (WRDI)
The write disable command sets status register WEN to “0” to prohibit unintentional writing. “Figure 8 Write Disable”
shows the timing waveforms. The write disable command consists only of the first bus cycle, and it is initiated by
inputting (04h).
The write disable state (WEN “0”) is exited by setting WEN to “1” using the write enable command (06h).
Figure 7 Write Enable
Figure 8 Write Disable
CS
SCK
SI
SO
8CLK
06h
High Impedance
Mode3
Mode0
01 2 3 4 5 6 7
(00000110)
CS
SCK
SI
SO
8CLK
04h
High Impedance
Mode3
Mode0
01 2 3 4
5 6 7
(00000100)
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相关代理商/技术参数 |
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|---|---|
| LE25CB1282 | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:EEPROM (SPI Bus) |
| LE25CB1282M | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:Serial SPI EEPROM (SPI Bus)(128Kbit) |
| LE25CB5122M | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:Serial SPI EEPROM (SPI Bus)(512Kbit) |
| LE25CB5122M-TLM-E | 制造商:Sony Semiconductor Solutions Division 功能描述: |
| LE25CB643M-TLM-E | 功能描述:电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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