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参数资料
| 型号： | LF3310QC12 |
| 厂商： | LOGIC DEVICES INC |
| 元件分类： | 数字信号处理外设 |
| 英文描述： | Horizontal / Vertical Digital Image Filter |
| 中文描述： | 12-BIT, DSP-DIGITAL FILTER, PQFP144 |
| 封装： | PLASTIC, QFP-144 |
| 文件页数： | 12/21页 |
| 文件大小： | 287K |
| 代理商： | LF3310QC12 |
DEVICES INCORPORATED
LF3310
Horizontal / Vertical Digital Image Filter
12
Video Imaging Products
11/08/2001-LDS.3310-H
ADDR
1
COEF
0
COEF
7
ADDR
2
COEF
0
COEF
7
ADDR
3
COEF
0
COEF
7
COEFFICIENT SET 1
COEFFICIENT SET 2
COEFFICIENT SET 3
CLK
HLD/VLD
HCF/VCF
11-0
W1
W1: Coefficient Set 1 written to coefficient banks during this clock cycle.
W2: Coefficient Set 2 written to coefficient banks during this clock cycle.
W3: Coefficient Set 3 written to coefficient banks during this clock cycle.
W2
W3
F
IGURE
12. C
OEFFICIENT
B
ANK
L
OADING
S
EQUENCE
F
IGURE
13. C
ONFIGURATION
/C
ONTROL
R
EGISTER
L
OADING
S
EQUENCE
ADDR
1
DATA
1
ADDR
3
DATA
4
CONFIG REG
ROUND REGISTER
LIMIT REGISTER
CLK
HLD/VLD
HCF/VCF
11-0
W2
W1: Configuration Register loaded with new data on this rising clock edge.
W2: Select Register loaded with new data on this rising clock edge.
W3: Round Register loaded with new data on this rising clock edge.
W4: Limit Register loaded with new data on this rising clock edge.
W3
W4
DATA
1
DATA
3
DATA
2
ADDR
4
DATA
2
DATA
1
SELECT REG
ADDR
2
DATA
1
W1
Coefficient Banks
The coefficient banks store the
coefficients which feed into the
multipliers in the horizontal and
vertical filters. There is a separate
bank for each multiplier. Each bank
can hold 256 12-bit coefficients. The
banks are loaded using an LF
Interface
TM
. There is a separate LF
Interface
TM
for the horizontal and
vertical banks. Coefficient bank
loading is discussed in the LF
Interface
TM
section.
Configuration and Control Registers
The Configuration Registers deter-
mine how the HV Filter operates.
Tables 2 through 7 show the formats
of the six configuration registers.
There are three types of control
registers: round, select, and limit.
There are sixteen round registers for
the horizontal filter and sixteen for the
vertical filter. Each register is 32-bits
wide. HRSL
3-0
and VRSL
3-0
determine
which horizontal and vertical round
registers respectively are used for
rounding.
There are sixteen select registers for
the horizontal filter and sixteen for
the vertical filter. Each register is
5-bits wide. HRSL
3-0
and VRSL
3-0
determine which horizontal and
vertical select registers respectively
are used in the select circuitry.
There are sixteen limit registers for
the horizontal filter and sixteen for
the vertical filter. Each register is
24-bits wide and stores both an upper
and lower limit value. The lower
limit is stored in bits 11-0 and the
upper limit is stored in bits 23-12.
HRSL
3-0
and VRSL
3-0
determine
which horizontal and vertical limit
registers respectively are used for
limiting when limiting is enabled.
Configuration and Control Register
loading is discussed in the LF
Interface
TM
section.
LF Interface
TM
The Horizontal and Vertical
LF Interfaces
TM
are used to load data
into the horizontal and vertical
coefficient banks respectively. They
are also used to load data into the
Configuration and Control Registers.
The following section describes how
the Horizontal LF Interface
TM
works.
The Horizontal and Vertical
LF Interfaces
TM
are identical in
function. If HLD and HCF
11-0
are
replaced with VLD and VCF
11-0
, the
following section will describe how
the Vertical LF Interface
TM
works.
HLD is used to enable and disable the
Horizontal LF Interface
TM
. When
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| LF3310 | Horizontal / Vertical Digital Image Filter |
| LF3310QC15 | Horizontal / Vertical Digital Image Filter |
| LF3330QC12 | Vertical Digital Image Filter |
| LF3330QC15 | Vertical Digital Image Filter |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LF3310QC15 | 制造商:LOGIC 制造商全称:LOGIC 功能描述:Horizontal / Vertical Digital Image Filter |
| LF3310QC18 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital Filter |
| LF3310QC25 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital Filter |
| LF3311 | 制造商:LOGIC 制造商全称:LOGIC 功能描述:Horizontal / Vertical Digital Image Filter |
| LF3312 | 制造商:LOGIC 制造商全称:LOGIC 功能描述:12-Mbit Frame Buffer / FIFO |
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