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| 型号： | LM12438CIWMX |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 封装： | SOP-28 |
| 文件页数： | 17/80页 |
| 文件大小： | 1552K |
| 代理商： | LM12438CIWMX |
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50 Pin Descriptions (Continued)
TABLE I LM12 L 438 Pin Description
(Continued)
Pin Number
Pin Name
Description
PLCC
SO
Pkg
20
26
P2
Serial interface input
Standard
CS
8051
1
I2C
SAD1
TMS320
FSX
21
27
P1
Serial interface input
Standard
R F (Clock risefall)
8051
1
I2C
SAD0
TMS320
FSR
22
28
MODESEL2
Serial mode selection inputs The logic states of these inputs determine the operation of
23
1
MODESEL1
the serial mode as shown below The standard mode covers the National’s MICROWIRE
Motorola’s SPI and Hitachi’s SCl protocols
MODESEL1 MODESEL2
01
Standard mode
00
8051
10
I2C
11
TMS320
24
2
CLK
The device main clock input The operating range of clock frequency is 005 MHz to
100 MHz The device accuracy is guaranteed only for the clock frequencies indicated in
the specification tables
25
3
INT
Interrupt output This is an active low output An interrupt is generated any time a non-
masked interrupt condition takes place There are seven different conditions that can
generate an interrupt (Refer to Section 624) The interrupt is set high (inactive) by reading
the interrupt status register This output can drive up to 100 pF of capacitive loads An
external buffer should be used for driving higher capacitive loads
26
4
SYNC
Synchronization inputoutput SYNC is an input if the Configuration Register’s SYNC IO bit
is ‘‘0’’ and output when the bit is ‘‘1’’ When sync is an input a rising edge on this pin
causes the internal SH to hold the input signal and a conversion cycle or a comparison
cycle (depending on the programmed instruction) to be started (The conversion or
comparison actually begins on the rising edge of the CLK immediately following the rising
edge of sync) When output it goes high at the start of a conversion or a comparison cycle
and returns low when the cycle is completed At power up the SYNC pin is set as an input
When used as an output it can drive up to 100 pF of capacitive loads An external buffer
should be used for driving higher capacitive loads
27
5
STANDBYOUT
Stand-by output This is an active low output STANDBYOUT will be activated when the
LM12 L 438 is put into stand-by mode through the Configuration Register’s stand-by bit It
is used to force any other devices in the system (signal conditioning circuitry for example)
to go into power-down mode This is done by connecting the ‘‘shutdown’’ ‘‘powerdown’’
‘‘standby’’ etc pins of the other ICs to STANDBYOUT In those cases where the peripheral
ICs do not have the power-down inputs STANDBYOUT can be used to turn off their power
through an electronic switch Note that the logic polarity of the STANDBYOUT is the
opposite to that of the stand-by bit in the Configuration Register
28
6
VDa
Digital supply See above definition
LM12434 Pin Description (Same as LM12 L 438 with the exceptions of the following pins)
LM12434 Pin Description (Same As LM12 L 438 with the exception of the following pins)
6
12
MUXOUTb
Multiplexer outputs These are the LM12434’s externally available analog MUX output pins
7
13
MUXOUTa
Analog inputs are directed to these outputs based on the Instruction RAM programming
8
14
SH INb
Sample-and-hold inputs These are the inverting and non-inverting inputs of the sample-
9
15
SH INa
and-hold LM12434 allows external analog signal conditioning circuits to be placed
between MUX outputs and SH inputs
24
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