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参数资料
| 型号： | LM96080CIMT-NOPB |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO24 |
| 封装： | ROHS COMPLIANT, PLASTIC, TSSOP-24 |
| 文件页数： | 15/30页 |
| 文件大小： | 600K |
| 代理商： | LM96080CIMT-NOPB |
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12.0 REGISTERS AND RAM
12.1 Address Register
The bit designations for a register are as follows:
Bit
Name
Read/Write
Description
7-0 Address Pointer
Read/Write Address of RAM and Registers. See the tables below for detail.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Address Pointer (Power On default 00h)
A7
A6
A5
A4
A3
A2
A1
A0
12.2 Address Pointer Index (A7–A0)
Registers and RAM
A7–A0 in Hex
Power On Value of Registers:
<7:0> in Binary
Configuration Register
00h
0000 1000
Interrupt Status Register 1
01h
0000 0000
Interrupt Status Register 2
02h
0000 0000
Interrupt Mask Register 1
03h
0000 0000
Interrupt Mask Register 2
04h
0000 0000
Fan Divisor/RST_OUT/OS
05h
0001 0100
OS Configuration/Temperature
Resolution Register
06h
0000 0001
Conversion Rate Register
07h
0000 0000
Channel Disable Register
08h
0000 0000
Value RAM
20h – 3Fh
Register 3Eh defaults to 0000 0001
Register 3Fh defaults to 0000 1000
12.3 Configuration Register—Address 00h
Power on default <7:0> = 00001000 binary
Bit
Name
Read/Write
Description
0
Start
Read/Write A one enables startup of monitoring operations, a zero puts the part in shutdown mode.
Note:
Unlike the "INT_Clear" bit, the outputs of Interrupt pins will not be cleared if the user writes
a zero to this location after an interrupt has occurred. At startup, limit checking functions and
scanning begin. Note, all limits should be set in the Value RAM before setting this bit HIGH.
1
INT Enable
Read/Write A one enables the INT Interrupt output.
2
INT Polarity
Select
Read/Write A one selects an active high open source output while a zero selects an active low open drain
output.
3
INT_Clear
Read/Write A one disables the INT output without affecting the contents of Interrupt Status Registers. The
device will stop monitoring. It will resume upon clearing of this bit.
4
RESET
Read/Write A one outputs at least a 10 ms active low reset signal at RST_OUT, if bit 7 and bit 6 in the Fan
Divisor/RST_OUT/OS Register (address 05h) = 1 and = 0, respectively. This bit is cleared once
the pulse has gone inactive.
5
Chassis Clear
Read/Write A one clears the GPI (Chassis Intrusion) pin. This bit clears itself after 10 ms.
6
GPO
Read/Write A one drives the GPO (General Purpose Output) pin low.
7
INITIALIZATION
Read/Write A one restores power on default value to the Configuration Register, Interrupt Status Registers,
Interrupt Mask Registers, Fan Divisor/RST_OUT/OS Register, the OS Configuration/
Temperature Resolution Register, Conversion Rate, Channel Disable, Manufacturers ID and
Stepping/Die revision ID registers. This bit clears itself. The power-on default is zero.
www.national.com
22
LM96080
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LM96080CIMT-NOPB1 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:System Hardware Monitor with 2-Wire Serial Interface |
| LM96080CIMTX/NOPB | 功能描述:板上安装温度传感器 RoHS:否 制造商:Omron Electronics 输出类型:Digital 配置: 准确性:+/- 1.5 C, +/- 3 C 温度阈值: 数字输出 - 总线接口:2-Wire, I2C, SMBus 电源电压-最大:5.5 V 电源电压-最小:4.5 V 最大工作温度:+ 50 C 最小工作温度:0 C 关闭: 安装风格: 封装 / 箱体: 设备功能:Temperature and Humidity Sensor |
| LM96080CIMTX-NOPB2 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:System Hardware Monitor with 2-Wire Serial Interface |
| LM96080EB/NOPB | 制造商:Texas Instruments 功能描述:SYSTEM HARDWARE MONITOR WITH 2-WIRE SERI - Boxed Product (Development Kits) 制造商:Texas Instruments 功能描述:BOARD EVAL FOR LM96080 制造商:Texas Instruments 功能描述:LM96080 EVAL BRD |
| LM96-1/2-LENS-KIT | 制造商:NSC 制造商全称:National Semiconductor 功能描述:LM9648 Color CMOS Image Sensor SXGA 18 FPS |
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