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| 型号： | LMH6734MQX/NOPB |
| 厂商： | National Semiconductor |
| 文件页数： | 16/21页 |
| 文件大小： | 0K |
| 描述： | IC BUFFER TRPL SELECT 16-SSOP |
| 标准包装： | 2,500 |
| 系列： | PowerWise® |
| 应用： | 电流反馈 |
| 电路数： | 3 |
| -3db带宽： | 925MHz |
| 转换速率： | 3750 V/µs |
| 电流 - 电源： | 19.5mA |
| 电流 - 输出 / 通道： | 80mA |
| 电压 - 电源，单路/双路(±)： | 3 V ~ 12 V，±1.5 V ~ 6 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-LSSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 带卷 (TR) |
| 配用： | LMH730275/NOPB-ND - EVAL BOARD HS TRIPLE SSOP OPAMP |
| 其它名称： | LMH6734MQX |
OBSOLETE
SNOSAY0C – JUNE 2007 – REVISED APRIL 2013
5V Electrical Characteristics
(1) (continued)
Unless otherwise specified, all limits are ensured for TA = 25°C, V
+ = +5V, A
V = +2, RL = 100. Boldface limits apply at the
temperature extremes.
Symbol
Parameter
Conditions
Min(2)
Typ(3)
Max(2)
Units
IO
Linear Output Current
VIN = 0V, VOUT < ±42 mV
(4)
±50
±60
mA
ISC
Short Circuit Current
VIN = 2V Output Shorted to
170
mA
Ground(5)
IIH
Disable Pin Bias Current High
Disable Pin = V+
72
μA
IIL
Disable Pin Bias Current Low
Disable Pin = 0V
360
μA
VDMAX
Voltage for Disable
Disable Pin
≤ VDMAX
3.2
V
VDMIM
Voltage for Enable
Disable Pin
≥ VDMIN
3.6
V
(4)
The maximum output current (IOUT) is determined by device power dissipation limitations. See the POWER DISSIPATION section of the
Application Information for more details.
(5)
Short circuit current should be limited in duration to no more than 10 seconds. See the POWER DISSIPATION section of the Application
Information for more details.
±5V Electrical Characteristics
(1)
Unless otherwise specified, all limits are ensured for TA = 25°C, V
+ = +5V, V = 5V, A
V = +2, RL = 100. Boldface limits
apply at the temperature extremes.
Symbol
Parameter
Conditions
Min(2)
Typ(3)
Max(2)
Units
Frequency Domain Performance
UGBW
3 dB Bandwidth
Unity Gain, VOUT = 200 mVPP
925
MHz
SSBW
3 dB Bandwidth
VOUT = 200 mVPP, RL = 100
730
SSBW
VOUT = 200 mVPP, RL = 150
760
MHz
LSBW
VOUT = 2 VPP
560
0.1 dB BW 0.1 dB Gain Flatness
VOUT = 200 mVPP
270
MHz
Time Domain Response
TRS
Rise and Fall Time
2V Step
0.7
ns
(10% to 90%)
TRL
5V Step
0.8
SR
Slew Rate
2V Step
3750
V/s
ts
Settling Time to 0.1%
2V Step
10
ns
te
Enable Time
From Disable = Rising Edge
10
ns
td
Disable Time
From Disable = Falling Edge
15
ns
Distortion
HD2L
2nd Harmonic Distortion
2 VPP, 10 MHz
72
dBc
HD3L
3rd Harmonic Distortion
2 VPP, 10 MHz
63
dBc
Equivalent Input Noise
VN
Non-Inverting Voltage
>10 MHz
2.1
nV/
√Hz
ICN
Inverting Current
>10 MHz
18.6
pA/
√Hz
NCN
Non-Inverting Current
>10 MHz
26.9
pA/
√Hz
Video Performance
DG
Differential Gain
4.43 MHz, RL = 150
0.03
%
DP
Differential Phase
4.43 MHz, RL = 150
0.03
deg
(1)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self heating where TJ> TA. See Application Information for information on temperature de-rating of this device.
Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted.
(2)
Limits are 100% production tested at 25C. Limits over the operating temperature range are specified through correlation using Statistical
Quality Control (SQC) methods.
(3)
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
4
Copyright 2007–2013, Texas Instruments Incorporated
Product Folder Links: LMH6734
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