参数资料
型号: LMX2377UTMX/NOPB
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 2500 MHz, PDSO20
封装: PLASTIC, TSSOP-20
文件页数: 22/44页
文件大小: 3181K
代理商: LMX2377UTMX/NOPB
Test Setups (Continued)
LMX2377U f
IN Impedance Test Setup
20022679
The block diagram above illustrates the setup required to
measure the LMX2377U device’s Main input impedance.
The Aux input impedance and reference oscillator imped-
ance setups are very much similar. The same setup is used
for
the
LMX2370TMEB/
LMX2370SLEEB
Evaluation
Boards. Measuring the device’s input impedance facilitates
the design of appropriate matching networks to match the
PLL to the VCO, or in more critical situations, to the charac-
teristic impedance of the printed circuit board (PCB) trace, to
prevent undesired transmission line effects.
Before the actual measurements are taken, the Network
Analyzer needs to be calibrated, i.e. the error coefficients
need to be calculated. Therefore, three standards will be
used to calculate these coefficients: an open, short and a
matched load. A 1-port calibration is implemented here.
To calculate the coefficients, the PLL chip is first removed
from the PCB. The Network Analyzer port is then connected
to the RF1 OUT connector of the evaluation board and the
desired operating frequency is set. The typical frequency
range selected for the LMX2377U device’s Main synthesizer
is from 100 MHz to 2500 MHz. The standards will be located
down the length of the RF1 OUT transmission line. The
transmission line adds electrical length and acts as an offset
from the reference plane of the Network Analyzer; therefore,
it must be included in the calibration. Although not shown, 0
resistors are used to complete the RF1 OUT transmission
line (trace).
To implement an open standard, the end of the RF1 OUT
trace is simply left open. To implement a short standard, a 0
resistor is placed at the end of the RF1 OUT transmission
line. Last of all, to implement a matched load standard, two
100
resistors in parallel are placed at the end of the RF1
OUT transmission line. The Network Analyzer calculates the
calibration coefficients based on the measured S
11 param-
eters. With this all done, calibration is now complete.
The PLL chip is then placed on the PCB. A power supply is
connected to V
CC and swept from 2.7V to 5.5V. The MI-
CROWIRE power supply, Vc, is tied to V
cc. The OSCin pin
is tied to the ground plane. Alternatively, the OSC
in pin can
be tied to V
CC. In this setup, the complementary input (fIN
Main) is AC coupled to ground. With the Network Analyzer
still connected to RF1 OUT, the measured f
IN Main imped-
ance is displayed.
Note: The impedance of the reference oscillator is measured
when the oscillator buffer is powered up (PWDN Main Bit =
0 or PWDN Aux Bit = 0), and when the oscillator buffer is
powered down (PWDN Main Bit = 1 and PWDN Aux Bit = 1).
LMX2377U
www.national.com
29
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