参数资料
型号: LP3875EMP-ADJ/NOPB
厂商: National Semiconductor
文件页数: 3/20页
文件大小: 0K
描述: IC REG LDO ADJ 1.5A SOT223-5
标准包装: 1
稳压器拓扑结构: 正,可调式
输出电压: 可调
输入电压: 2.5 V ~ 7 V
电压 - 压降(标准): 0.38V @ 1.5A
稳压器数量: 1
电流 - 输出: 1.5A(最小值)
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: TO-261-5,TO-261AB
供应商设备封装: SOT-223-5
包装: 标准包装
产品目录页面: 1292 (CN2011-ZH PDF)
其它名称: LP3875EMP-ADJDKR

BLOCK DIAGRAM
Figure 4. LP3875-ADJ
SNVS247D – SEPTEMBER 2003 – REVISED APRIL 2013
ABSOLUTE MAXIMUM RATINGS
(1)
If Military/Aerospace specified devices are required, contact the Texas Instruments Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature Range
Lead Temperature (Soldering, 5 sec.)
? 65°C to +150°C
260°C
ESD Rating
(2)
2 kV
Power Dissipation
(3)
Internally Limited
Input Supply Voltage (Survival)
Shutdown Input Voltage (Survival)
? 0.3V to +7.5V
? 0.3V to +7.5V
,
Output Voltage (Survival),
I OUT (Survival)
(4) (5)
? 0.3V to +6.0V
Short Circuit Protected
(1)
(2)
(3)
(4)
(5)
Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which
the device is intended to be functional, but does not specity performance limits. For specifications and test conditions, see Electrical
Characteristics. The specifications apply only for the test conditions listed. Some performance characteristics may degrade when the
device is not operated under the listed test conditions.
The human body model is a 100pF capacitor discharged through a 1.5k ? resistor into each pin.
At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO-220 package must be
derated at θ jA = 50°C/W (with 0.5in 2 , 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the DDPAK/TO-263
surface-mount package must be derated at θ jA = 60°C/W (with 0.5in 2 , 1oz. copper area), junction-to-ambient. The SOT-223 package
must be derated at θ jA = 90°C/W (with 0.5in 2 , 1oz. copper area), junction-to-ambient.
If used in a dual-supply system where the regulator load is returned to a negative supply, the output must be diode-clamped to ground.
The output PMOS structure contains a diode between the V IN and V OUT terminals. This diode is normally reverse biased. This diode will
get forward biased if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can
typically withstand 200mA of DC current and 1Amp of peak current.
RECOMMENDED OPERATING CONDITIONS
Input Supply Voltage (Operating),
(1)
2.5V to 7.0V
Shutdown Input Voltage (Operating)
Maximum Operating Current (DC)
Operating Junction Temperature Range
? 0.3V to 7.0V
1.5A
? 40°C to +125°C
(1)
The minimum operating value for V IN is equal to either [V OUT(NOM) + V DROPOUT ] or 2.5V, whichever is greater.
Copyright ? 2003–2013, Texas Instruments Incorporated
Product Folder Links: LP3875-ADJ
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