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参数资料
| 型号： | LP62S4096EU-70LLT |
| 厂商： | AMIC Technology Corporation |
| 英文描述： | 512K X 8 BIT LOW VOLTAGE CMOS SRAM |
| 中文描述： | 为512k × 8位低电压CMOS的SRAM |
| 文件页数： | 7/14页 |
| 文件大小： | 162K |
| 代理商： | LP62S4096EU-70LLT |
LP62S4096E-T Series
512K X 8 BIT LOW VOLTAGE CMOS SRAM
(January, 2002, Version 2.0)
AMIC Technology, Inc.
Features
n Power supply range: 2.7V to 3.6V
n Access times: 55ns / 70ns (max.)
n Current:
Very low power version: Operating: 30mA (max.)
Standby:
10
A (max.)
n Full static operation, no clock or refreshing required
n All inputs and outputs are directly TTL-compatible
n Common I/O using three-state output
n Data retention voltage: 2V (min.)
n Available in 32-pin TSOP/TSSOP 36-ball CSP package
General Description
The LP62S4096E-T is a low operating current 4,194,304-bit
static random access memory organized as 524,288 words
by 8 bits and operates on a low power supply range: 2.7V to
3.3V. It is built using AMIC's high performance CMOS
process.
Inputs and three-state outputs are TTL compatible and allow
for direct interfacing with common system bus structures.
Two chip enable inputs are provided for POWER-DOWN and
device enable and an output enable input is included for easy
interfacing.
Data retention is guaranteed at a power supply voltage as low
as 2V.
n CE2 pin for CSP package only
Product Family
Power Dissipation
Product Family
Operating
Temperature
VCC
Range
Speed
Data Retention
(ICCDR, Typ.)
Standby
(ISB1, Typ.)
Operating
(ICC2, Typ.)
Package
Type
LP62S4096E-T
-25
°C ~ +85°C 2.7V~3.6V
55ns / 70ns
0.08
A
0.3
A
5mA
32L TSOP
32L TSSOP
36B CSP
1. Typical values are measured at VCC = 3.0V, TA = 25
°C and not 100% tested.
2. Data retention current VCC = 2.0V.
Pin Configurations
n
n TSOP/(TSSOP)
n
n CSP (Chip Size Package)
36-pin Top View
LP62S4096EV-T
(LP62S4096EX-T)
1
16
17
32
Pin No.
Pin
Name
Pin No.
Pin
Name
1
2
A9
3
4
5
6
7
8
9
10
11
12
13
14
30
29
28
27
26
25
24
22
19
21
20
23
18
17
A8
A13
A17
A15
VCC
A18
I/O8
A16
A14
A12
A7
A6
A3
A2
A1
A0
I/O1
I/O2
GND
I/O4
I/O5
I/O6
I/O7
I/O3
A11
WE
CE1
15
16
31
32
A5
A4
A10
OE
A0
I/O5
I/O6
GND
VCC
I/O7
I/O8
A9
A10
OE
A11
CE1
A12
A13
A14
A16
A18
A17
A15
I/O4
I/O3
I/O2
I/O1
GND
VCC
A1
A2
CE2
WE
NC
A5
A4
A3
A6
A7
A8
6
5
4
3
2
1
A
B
C
D
E
F
G
H
相关PDF资料 |
PDF描述 |
|---|---|
| LP62S4096EV-55LLI | 512K X 8 BIT LOW VOLTAGE CMOS SRAM |
| LP62S4096EV-55LLT | 512K X 8 BIT LOW VOLTAGE CMOS SRAM |
| LP62S4096EV-70LLI | 512K X 8 BIT LOW VOLTAGE CMOS SRAM |
| LP62S4096EX-55LLI | 512K X 8 BIT LOW VOLTAGE CMOS SRAM |
| LP62S4096EX-55LLT | 512K X 8 BIT LOW VOLTAGE CMOS SRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LP62S4096EV-55LLI | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:512K X 8 BIT LOW VOLTAGE CMOS SRAM |
| LP62S4096EV-55LLT | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:512K X 8 BIT LOW VOLTAGE CMOS SRAM |
| LP62S4096EV-70LLI | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:512K X 8 BIT LOW VOLTAGE CMOS SRAM |
| LP62S4096EV-70LLT | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:512K X 8 BIT LOW VOLTAGE CMOS SRAM |
| LP62S4096EX-55LLI | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:512K X 8 BIT LOW VOLTAGE CMOS SRAM |
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