参数资料
型号: LT1339ISW#TRPBF
厂商: Linear Technology
文件页数: 8/20页
文件大小: 0K
描述: IC REG CTRLR BST PWM CM 20-SOIC
标准包装: 1,000
PWM 型: 电流模式
输出数: 1
频率 - 最大: 150kHz
占空比: 90%
电源电压: 最高 60V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
LT1339
FU CTIO AL BLOCK DIAGRA
V IN
V BOOST
PHASE
CT
5V REF
12V IN
MAIN
SWITCH
TG
TS
NONOVERLAPPING
SWITCH LOGIC
SYNC
BG
Q
SWITCH
UVLO
CIRCUIT
OSC
S
R
SL/ADJ
ONE SHOT
SENSE +
+
SYNC
V OUT
+
R SENSE
SENSE –
0.5 μ A
× 15
CURRENT
SENSE AMP
+
IC1
V FB
V REF
1.25V
+
EA
2.5V
V C
5V REF
5V
REFERENCE
8 μ A
SOFT START
50k
+
AVERAGE
RUN/SHDN
1.25V
+
CIRCUIT
ENABLE
CURRENT
LIMIT
SGND
PGND
SS
I AVG
1339 ? BD
OPERATIO N
Basic Control Loop
(Refer to Functional Block Diagram)
sense resistor (R SENSE ), is sufficient to trip the current
The LT1339 uses a constant frequency, current mode
synchronous architecture. The timing of the IC is provided
through an internal oscillator circuit, which can be syn-
chronized to an external clock, programmable to operate
at frequencies up to 150kHz. The oscillator creates a
modified sawtooth wave at its timing node (CT) with a slow
charge, rapid discharge characteristic.
During typical positive buck operation, the main switch
MOSFET is enabled at the start of each oscillator cycle. The
main switch stays enabled until the current through the
switched inductor, sensed via the voltage across a series
comparator (IC1) and, in turn, reset the RS latch. When the
RS latch resets, the main switch is disabled, and the
synchronous switch MOSFET is enabled. Shoot-through
prevention logic prohibits enabling of the synchronous
switch until the main switch is fully disabled. If the current
comparator threshold is not obtained throughout the
entire oscillator charge period, the RS latch is bypassed
and the main switch is disabled during the oscillator
discharge time. This “minimum off time” assures ad-
equate charging of the bootstrap supply, protects the main
switch, and is typically about 1 μ s.
sn1339 1339fas
8
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