参数资料
型号: LT1939EDD#PBF
厂商: Linear Technology
文件页数: 10/24页
文件大小: 349K
描述: IC REG DL BUCK/LINEAR 12DFN
标准包装: 121
拓扑: 降压(降压)(1),线性(LDO)(1)
功能: 任何功能
输出数: 2
频率 - 开关: 500kHz ~ 2.4MHz
电压/电流 - 输出 1: 0.8 V ~ 24.25 V,2A
电压/电流 - 输出 2: 0.8 V ~ 24.25 V,1A
带 LED 驱动器:
带监控器:
带序列发生器:
电源电压: 3 V ~ 25 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 12-WFDFN 裸露焊盘
供应商设备封装: 12-DFN
包装: 管件
LT1939
10
1939f
a drive voltage higher than V
IN
 to saturate the output NPN
and maintain high ef ciency.
In addition to the switching regulator, the LT1939 contains
a NPN linear regulator with a 0.8V reference, and 13mA
current capability. The 0.8 reference will track the SS pin
in the same manner as the switching regulator. The linear
output can also be con gured to drive an external NPN to
provide a linear regulator with higher current capability.
OPERATION
A power good comparator with 30mV of hysteresis trips
when both FB and LFB are above 90% of the 0.8V refer-
ence. The PG output is an open collector NPN that is off
when the output is in regulation allowing a resistor to pull
the PG pin to a desired voltage. The PG output is an open-
collector NPN that is on when the output is in regulation
providing either drive for an output disconnect transistor
or inverted power good logic.
APPLICATIONS INFORMATION
Choosing the Output Voltage
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1% resis-
tors according to:
 
R1=R2
V
OUT1
0.8
V
1
R2 should be 10.0k or less to avoid bias current errors.
Reference designators refer to the Block Diagram in
Figure 1.
Choosing the Switching Frequency
The LT1939 switching frequency is set by resistor R5 in
Figure 1. The R
T
/SYNC pin is internally regulated at 1V.
Setting resistor R5 sets the current in the R
T
/SYNC pin
which determines the oscillator frequency as illustrated
in Figure 2.
The switching frequency is typically set as high as pos-
sible to reduce overall solution size. The LT1939 employs
techniques to enhance dropout at high frequencies but
ef ciency and maximum input voltage decrease due to
switching losses and minimum switch on times. The
maximum recommended frequency can be approximated
by the equation:
 
Frequency (Hz)=
V
OUT1
+V
D
V
IN
V
SW
+V
D
"
1
t
ON(MIN
)
where V
D
 is the forward voltage drop of the catch diode
(D1 Figure 1), V
SW
 is the voltage drop of the internal
switch, and t
ON(MIN)
 is the minimum on time of the
switch, all at maximum load current.
Figure 2. Frequency vs R
T
/SYNC Resistance
R
RT/SYNC
 (k?
0
1500
2000
2500
160
1939 G17
1000
500
1250
1750
2250
750
250
0
40
20
80
60
120 140   180
100
200
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