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参数资料
| 型号： | LT1952MPGN#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, 560 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | 0.150 INCH, LEAD FREE, PLASTIC, SSOP-16 |
| 文件页数： | 9/28页 |
| 文件大小： | 357K |
| 代理商： | LT1952MPGN#PBF |
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LT1952/LT1952-1
17
19521fe
Example calculation for (2)
For RT = 35.7k, RB = 100k, VREF = 2.5V,
RDELAY = 40k, fOSC = 200kHz and SD_VSEC = 1.32V,
this gives SS_MAXDC(DC) = 1.84V, tDELAY = 40ns
and k = 1
Maximum Duty Cycle Clamp
=10.522(1.84/1.32)–(40ns200kHz)
= 0.728 – 0.008 = 0.72 (Duty Cycle Clamp = 72%)
Note 1: To achieve the same maximum duty cycle clamp at
100kHz as calculated for 200kHz, the SS_MAXDC voltage
should be reprogrammed by:
SS_MAXDC(DC) (100kHz)
=SS_MAXDC(DC)(200kHz)k(200kHz)/k(100kHz)
=1.841.0/1.055=1.74V(k=1.055for100kHz)
Note 2 : To achieve the same maximum duty cycle clamp
while synchronizing to an external clock at the SYNC pin,
the SS_MAXDC voltage should be re-programmed as:
SS_MAXDC (DC) (fsync)
=SS_MAXDC(DC)(200kHz)[(fosc/fsync)+
0.09(fosc/200kHz)0.6]
For SS_MAXDC (DC) (200kHz) = 1.84V for 72%
duty cycle
SS_MAXDC (DC) (fsync = 250kHz) for 72%
duty cycle
=1.84[(200kHz/250kHz)+0.09(1)0.6]
= 1.638V
Programming Soft-Start Timing
The LT1952/LT1952-1 have built-in soft-start capability to
provide low stress controlled start-up from a list of fault
conditions that can occur in the application (see Figure 1
and Figure 10). The LT1952/LT1952-1 provide true PWM
soft-start by using the SS_MAXDC pin to control soft-start
timing.TheproportionalrelationshipbetweenSS_MAXDC
voltage and switch maximum duty cycle clamp allows
the SS_MAXDC pin to slowly ramp output voltage by
ramping the maximum switch duty cycle clamp—until
switch duty cycle clamp seamlessly meets the natural duty
cycle of the converter. A capacitor CSS on the SS_MAXDC
pin and the resistor divider from VREF used to program
APPLICATIONS INFORMATION
maximum switch duty cycle clamp, determine soft-start
timing (Figure 11).
A soft-start event is triggered for the following faults:
(1) VIN < 8.75V, or
(2) SD_VSEC < 1.32V (UVLO), or
(3) OC > 107mV (overcurrent condition)
When a soft-start event is triggered, switching at SOUT
and OUT is stopped immediately. A soft-start latch is set
andSS_MAXDCpinisdischarged.TheSS_MAXDCpincan
only recharge when the soft-start latch has been reset.
Note: A soft-start event caused by (1) or (2) above, also
causes VREF to be disabled and to fall to ground.
Soft-start latch reset requires all of the following:
Figure 10. Soft-Start Timing
SOFT-START
EVENT TRIGGERED
SOFT-START
EVENT TRIGGERED
TIMING (A): SOFT START FAULT REMOVED
BEFORE SS_MAXDC FALLS TO 0.45V
TIMING (A): SOFT START FAULT REMOVED
BEFORE SS_MAXDC FALLS TO 0.45V
SS_MAXDC
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
1952 F10
TIMING (B): SOFT-START FAULT REMOVED
AFTER SS_MAXDC FALLS PAST 0.45V
TIMING (B): SOFT-START FAULT REMOVED
AFTER SS_MAXDC FALLS PAST 0.45V
SS_MAXDC
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.2V
Figure 11. Programming Soft-Start Timing
SS_MAXDC CHARGING MODEL
SS_MAXDC(DC) = VREF [RB/(RT + RB)]
RCHARGE = [RT RB/(RT + RB)]
SS_MAXDC(DC)
1952 F11
SS_MAXDC
LT1952/
LT1952-1
RCHARGE
SS_MAXDC
VREF
LT1952/
LT1952-1
RB
CSS
RT
CSS
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