参数资料
型号: LT1956IFE-5#PBF
厂商: Linear Technology
文件页数: 10/28页
文件大小: 0K
描述: IC REG BUCK 5V 1.5A 16TSSOP
标准包装: 95
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 5V
输入电压: 5.5 V ~ 60 V
PWM 型: 电流模式
频率 - 开关: 500kHz
电流 - 输出: 1.5A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 管件
供应商设备封装: 16-TSSOP-EP
LT1956/LT1956-5
APPLICATIO S I FOR ATIO
Peak-to-peak output ripple voltage is the sum of a triwave
(created by peak-to-peak ripple current (I LP-P ) times ESR)
and a square wave (created by parasitic inductance (ESL)
and ripple current slew rate). Capacitive reactance is
assumed to be small compared to ESR or ESL.
ceramic capacitor. Although this reduction of ESR re-
moves a useful zero in the overall loop response, this zero
can be replaced by inserting a resistor (R C ) in series with
the V C pin and the compensation capacitor C C . (See
Ceramic Capacitors in Applications Information.)
V RIPPLE = ( I LP - P )( ESR ) + ( ESL ) Σ
dI
dt
Peak Inductor Current and Fault Current
To ensure that the inductor will not saturate, the peak in-
( V OUT )( V IN – V OUT )
( V IN )( f )( L )
where:
ESR = equivalent series resistance of the output
capacitor
ESL = equivalent series inductance of the output
capacitor
dI/dt = slew rate of inductor ripple current = V IN /L
Peak-to-peak ripple current (I LP-P ) through the inductor
and into the output capacitor is typically chosen to be
between 20% and 40% of the maximum load current. It is
approximated by:
I LP - P =
Example: with V IN = 12V, V OUT = 5V, L = 15 μ H, ESR =
0.080 ? and ESL = 10nH, output ripple voltage can be
ductor current should be calculated knowing the maximum
load current. An appropriate inductor should then be cho-
sen. In addition, a decision should be made whether or not
the inductor must withstand continuous fault conditions.
If maximum load current is 0.5A, for instance, a 0.5A
inductor may not survive a continuous 2A overload condi-
tion. Dead shorts will actually be more gentle on the
inductor because the LT1956 has frequency and current
limit foldback.
Peak inductor and switch current can be significantly
higher than output current, especially with smaller induc-
tors and lighter loads, so don’t omit this step. Powdered
Table 2
VENDOR/ VALUE I DC(MAX) DCR HEIGHT
PART NO. ( μ H) (Amps) (Ohms) (mm)
Coiltronics
approximated as follows:
UP1B-100
10
1.9
0.111
5.0
( 12 ) ( )( ) 6 –
15 ? 10 500 ? 10
I LP-P =
( 5 ) ( 12 ? 5 )
– 6
= 0 . 389 A
UP1B-220
UP2B-220
UP2B-330
UP1B-150
22
22
33
15
1.2
2.0
1.7
1.5
0.254
0.062
0.092
0.175
5.0
6.0
6.0
5.0
= = 10 6 ? 0 . 8
Σ
V RIPPLE = ( )( ) + ( 10 ? 10 )( 10 ) ( )
? 9 6
dI 12
dt 15 ? 10 ? 6
0 . 389 0 . 08 0 . 8
= 0 . 031 + 0 . 008 = 39 mV P-P
To reduce output ripple voltage further requires an in-
crease in the inductor value with the trade-off being a
physically larger inductor with the possibility of increased
component height and cost.
Ceramic Output Capacitor
An alternative way to further reduce output ripple voltage
is to reduce the ESR of the output capacitor by using a
Coilcraft
D01813P-153HC
D01813P-103HC
D53316P-223
D53316P-333
LP025060B-682
Sumida
CDRH4D28-4R7
CDRH5D28-100
CDRH6D28-150
CDRH6D28-180
CDRH6D28-220
CDRH6D38-220
15
10
22
33
6.8
4.7
10
15
18
22
22
1.5
1.9
1.6
1.4
1.3
1.32
1.30
1.40
1.32
1.20
1.30
0.170
0.111
0.207
0.334
0.165
0.072
0.065
0.084
0.095
0.128
0.096
5.0
5.0
5.1
5.1
1.65
3.0
3.0
3.0
3.0
3.0
4.0
1956f
10
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