参数资料
| 型号： | LT1994MPDD#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 16/20页 |
| 文件大小： | 0K |
| 描述： | IC DIFF AMP/DRIVER LN 8-MSOP |
| 标准包装： | 2,500 |
| 放大器类型： | 差分 |
| 电路数： | 1 |
| 输出类型： | 满摆幅 |
| 转换速率： | 65 V/µs |
| 增益带宽积： | 70MHz |
| 电流 - 输入偏压： | 18µA |
| 电压 - 输入偏移： | 3000µV |
| 电流 - 电源： | 14.8mA |
| 电流 - 输出 / 通道： | 85mA |
| 电压 - 电源，单路/双路(±)： | 2.375 V ~ 12.6 V，±1.188 V ~ 6.3 V |
| 工作温度： | -55°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-WFDFN 裸露焊盘 |
| 供应商设备封装： | 8-DFN-EP（3x3） |
| 包装： | 带卷 (TR) |
5
1994fb
LT1994
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs are protected by a pair of back-to-back diodes. If the
differential input voltage exceeds 1V, the input current should be limited to
less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indenitely.
Note 4: The LT1994C/LT1994I are guaranteed functional over the
operating temperature range –40°C to 85°C. The LT1994H is guaranteed
functional over the operating temperature range –40°C to 125°C. The
LT1994MP is guaranteed functional over the operating temperature range
–55°C to 125°C.
Note 5: The LT1994C is guaranteed to meet specied performance from
0°C to 70°C. The LT1994C is designed, characterized, and expected to
meet specied performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LT1994I is guaranteed to meet
specied performance from –40°C to 85°C. The LT1994H is guaranteed
to meet specied performance from –40°C to 125°C. The LT1994MP is
guaranteed to meet specied performance from –55°C to 125°C.
Note 6: Input bias current is dened as the average of the input currents
owing into Pin 1 and Pin 8 (IN– and IN+). Input Offset current is dened
as the difference of the input currents owing into Pin 8 and Pin 1
(IOS = IB+ – IB–).
Note 7: Input Common Mode Range is tested using the Test Circuit of
Figure 1 (RF = RI) by applying a single ended 2VP-P, 1kHz signal to VINP
(VINM = 0), and measuring the output distortion (THD) at the common
mode Voltage Range limits listed in the Electrical Characteristics table,
and conrming the output THD is better than –40dB. The voltage range for
the output common mode range (Pin 2) is tested using the Test Circuit of
Figure 1 (RF = RI) by applying a 0.5V peak, 1kHz signal to the VOCM
Pin 2 (with VINP = VINM = 0) and measuring the output distortion (THD)
at VOUTCM with VOCM biased 0.5V from the VOCM pin range limits listed
in the Electrical Characteristics Table, and conrming the THD is better
than –40dB.
Note 8: Input CMRR is dened as the ratio of the change in the input
common mode voltage at the pins IN+ or IN– to the change in differential
input referred voltage offset. Output CMRR is dened as the ratio of the
change in the voltage at the VOCM pin to the change in differential input
referred voltage offset.
Note 9: Differential Power Supply Rejection (PSRR) is dened as the ratio
of the change in supply voltage to the change in differential input referred
voltage offset. Common Mode Power Supply Rejection (PSRRCM) is
dened as the ratio of the change in supply voltage to the change in the
common mode offset, VOUTCM – VOCM.
Note 10: Output swings are measured as differences between the output
and the respective power supply rail.
Note 11: Extended operation with the output shorted may cause junction
temperatures to exceed the 150°C limit and is not recommended.
ELECTRICAL CHARACTERISTICS The l denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = mid-supply, VSHDN = OPEN,
RI = RF = 499Ω, RL = 800Ω to a mid-supply voltage (See Figure 1) unless otherwise noted. VS is dened (V+ – V–). VOUTCM is dened
as (VOUT+ + VOUT–)/2. VICM is dened as (VIN+ + VIN–)/2. VOUTDIFF is dened as (VOUT+ – VOUT–). VINDIFF is dened as (VIN+ – VIN–).
SYMBOL
PARAMETER
CONDITIONS
C/I GRADES
H/MP GRADES
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
VIL
SHDN Input Logic Low
VS = 3V to ±5V
l
V+
– 2.1
V+
– 2.1
V
VIH
SHDN Input Logic High
VS = 3V to ±5V
l
V+
– 0.6
V+
– 0.6
V
RSHDN
SHDN Pull-Up Resistor
VS = 2.375V to ±5V
40
55
75
40
55
75
k
Ω
tON
Turn-On Time
VSHDN 0.5V to 3V
1
μs
tOFF
Turn-Off Time
VSHDN 3V to 0.5V
1
μs
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