参数资料
型号: LT3032IDE#PBF
厂商: Linear Technology
文件页数: 5/24页
文件大小: 0K
描述: IC REG LDO ADJ .15A 14DFN
产品培训模块: LT3032 - 150mA Dual Positive/Negative Low Noise LDO
特色产品: LT3032 Voltage Linear Regulator
标准包装: 91
稳压器拓扑结构: 正可调式和负可调式
输出电压: ±1.22 V ~ ±20 V
输入电压: ±2.3 V ~ ±20 V
电压 - 压降(标准): 0.27V @ 150mA,0.3V @ -150mA
稳压器数量: 2
电流 - 输出: 150mA
电流 - 限制(最小): 170mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 14-WFDFN 裸露焊盘
供应商设备封装: 14-DFN(4x3)
包装: 管件
产品目录页面: 1330 (CN2011-ZH PDF)
LT3032 Series
ELECTRICAL CHARACTERISTICS The l denotes the speci?cations which apply over the full operating
temperature range, otherwise speci?cations are at T A = 25°C.
PARAMETER
Output Voltage Noise (10Hz to 100kHz)
CONDITIONS
C OUTP = 10μF, C BYPP 0.01μF, I LOAD = 150mA
MIN
TYP
20
MAX
UNITS
μV RMS
C OUTN = 10μF, C BYPN 0.01μF, I LOAD = –150mA
30
μV RMS
Ripple Rejection
V RIPPLE = 0.5V P-P, f RIPPLE = 120Hz
Current Limit (Note 12)
V INP to V OUTP = 1.5V (Average), I LOAD = 100mA
V INN to V OUTN = –1.5V (Average), I LOAD = –100mA
V INP = 7V, V OUTP = 0V
50
46
68
54
400
dB
dB
mA
V INN = –7V, V OUTN = 0V
V INP = 2.3V or V OUTP(NOMINAL) + 1V, ΔV OUTP = –0.1V
V INN = –2.3V or V OUTP(NOMINAL) – 1V, ΔV OUTN = 0.1V
l
l
170
170
350
mA
mA
mA
INP Reverse Leakage Current
INN Reverse Leakage Current
V INP = –20V, V OUTP = 0V
V INN = 20V, V OUTN , V ADJN , V SHDNN = Open Circuit
l
l
–1
1
mA
mA
Reverse Output Current
(Notes 5, 11)
LT3032-5
LT3032-12
LT3032-15
LT3032
V OUTP = 5V, V INP < 5V
V OUTP = 12V, V INP < 12V
V OUTP = 15V, V INP < 15V
V OUTP = V ADJP = 1.22V, V INP < 1.22V
10
25
25
5
20
50
50
10
μA
μA
μA
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3032 is tested and speci?ed under pulse load conditions
such that T J ? T A . The LT3032E is 100% tested at T A = 25°C. Performance
of the LT3032E over the full –40°C to 125°C operating junction
temperature range is assured by design, characterization, and correlation
with statistical process controls. The LT3032I regulators are guaranteed
over the full –40°C to 125°C operating junction temperature range.
Note 3: Parasitic diodes exist internally between the INN pin and the OUTN,
ADJN, and SHDNN pins. These pins cannot be pulled more than 0.5V
below the INN pin during fault conditions, and must remain at a voltage
more positive than the INN pin during operation.
Note 4: Operating conditions are limited by maximum junction
temperature. Speci?cations do not apply for all possible combinations of
input voltages and output currents. When operating at maximum input
voltages, the output current ranges must be limited. When operating at
maximum output currents, the input voltage ranges must be limited.
Note 5: The LT3032 is tested and speci?ed for these conditions with the
ADJP pin tied to the OUTP pin and the ADJN pin tied to the OUTN pin.
Note 6: To satisfy requirements for minimum input voltage, the LT3032 is
tested and speci?ed for these conditions with an external resistor divider
(two 250k resistors) from OUTP/OUTN to the corresponding ADJP/ADJN
pin to give an output voltage of ±2.44V. The external resistor divider adds a
5μA DC load on the output. The LT3032-12/LT3032-15 have higher internal
resistor divider current, resulting in higher GND pin current at light/no load.
Note 7: Dropout voltage is the minimum input-to-output voltage
For lower output voltages, dropout voltage is limited by the minimum
input voltage speci?cation under some output voltage/load conditions;
see curves for Minimum INN Voltage and Minimum INP Voltage in Typical
Performance Characteristics. LTC is unable to guarantee Maximum
Dropout Voltage speci?cations at 50mA and 150mA due to production
test limitations with Kelvin-Sensing the package pins. Please consult the
Typical Performance Characteristics for curves of Dropout Voltage as a
function of Output Load Current and Temperature.
Note 8: GND pin current is tested with V INP = V OUTP(NOMINAL) or V INN =
V OUTN(NOMINAL) and a current source load. This means the device is tested
while operating in its dropout region. This is the worst-case GND pin
current. GND pin current decreases slightly at higher input voltages.
Note 9: Positive current ?ow is into the pin. Negative current ?ow is out of
the pin.
Note 10: For input-to-output differential voltages from INN to OUTN
greater than –7V, a –50μA load is needed to maintain regulation.
Note 11: Reverse output current is tested with the INP pin grounded and
the OUTP pin forced to the nominal output voltage. This current ?ows into
the OUTP pin and out the GND pin.
Note 12: Positive side current limit is tested at V INP = 2.3V or
V OUTP(NOMINAL) + 1V (whichever is more positive). Negative side current
limit is tested at V INN = –2.3V or V OUTN(NOMINAL) – 1V (whichever is more
negative).
Note 13: LTC is unable to guarantee load regulation speci?cations on
?xed voltage versions of the LT3032 due to production test limitations
with Kelvin-Sensing the package pins. Please consult the Typical
Performance Characteristics for curves of Load Regulation as a function of
Temperature.
differential needed to maintain regulation at a speci?ed output current. In
dropout, output voltage equals:
V INP/INN – V DROPOUT
3032fd
5
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