参数资料
型号: LT3579EFE-1#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: SWITCHING REGULATOR, PDSO20
封装: 4.40 MM, LEAD FREE, PLASTIC, TSSOP-20
文件页数: 18/40页
文件大小: 503K
代理商: LT3579EFE-1#PBF
LT3579/LT3579-1
25
35791f
appenDix
Table 5. Inductor Manufacturers
Vishay
IHLP-2020BZ-01 and
IHLP-2525CZ-01 Series
www.vishay.com
Coilcraft
XLP, MLC and MSS Series www.coilcraft.com
Cooper Bussmann DRQ125 and DRQ127
Series
www.cooperbussmann.
com
Sumida
CDRH series
www.sumida.com
TDK
RLF and SLF series
www.tdk.com
Würth
WE-PD, WE-PDF, WE-HC
and WE-DD Series
www.we-online.com
Minimum Inductance
Although there can be a tradeoff with efficiency, it is often
desirable to minimize board space by choosing smaller
inductors. When choosing an inductor, there are three
conditionsthatlimittheminimuminductance;(1)providing
adequate load current, (2) avoidance of subharmonic
oscillation, and (3) supplying a minimum ripple current
to avoid false tripping of the current comparator.
Adequate Load Current
Smallvalueinductorsresultinincreasedripplecurrentsand
thus, due to the limited peak switch current, decrease the
average current that can be provided to the load. In order
to provide adequate load current, L should be at least:
LBOOST >
DC
VIN VCESAT
(
)
2
fOSC IPK
VOUT IOUT
VIN η
or
LDUAL >
DC
VIN VCESAT
(
)
2
fOSC IPK
|VOUT |IOUT
VIN η
IOUT
Boost
Topology
SEPIC
or
Inverting
Topologies
where:
LBOOST = L1 for Boost Topologies (see Figure 6)
LDUAL = L1 = L2 for Coupled Dual Inductor
Topologies (see Figures 7 and 8)
LDUAL = L1 || L2 for Uncoupled Dual Inductor
Topologies (see Figures 7 and 8)
DC
= SwitchDutyCycle(seePowerSwitchDuty
Cycle section in Appendix)
IPK
= Maximum Peak Switch Current; Should
Not Exceed 6A for a Combined SW1 +
SW2 Current or 3.4A of SW1 Current (see
Electrical Characteristics section.)
η
= Power Conversion Efficiency (typically 90%
for Boost and 85% for Dual Inductor
Topologies at high currents)
fOSC
= Switching Frequency
IOUT
= Maximum Output Current
Negative values of LBOOST or LDUAL indicate that the
output load current, IOUT, exceeds the switch current limit
capability of the LT3579.
Avoiding Sub-Harmonic Oscillations
The LT3579’s internal slope compensation circuit will
prevent sub-harmonic oscillations that can occur when
the duty cycle is greater than 50%, provided that the
inductance exceeds a minimum value. In applications that
operate with duty cycles greater than 50%, the inductance
must be at least:
LMIN =
VIN VCESAT
(
) 2DC1
(
)
4A
fOSC 1DC
(
)
where:
LMIN = L1 for Boost Topologies (see Figure 6)
LMIN = L1 = L2 for Coupled Dual Inductor
Topologies (see Figures 7 and 8)
LMIN = L1 || L2 for Uncoupled Dual Inductor
Topologies (see Figures 7 and 8)
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