参数资料
| 型号： | LT3587EUD#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 15/24页 |
| 文件大小： | 0K |
| 描述： | IC REG BOOST INV ADJ DL 20QFN |
| 标准包装： | 2,500 |
| 类型： | 升压（升压），反相 |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 可调至 ±32V |
| 输入电压： | 2.5 V ~ 6 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-QFN 裸露焊盘（3x3） |
LT3587
APPLICATIONS INFORMATION
FLT
CAP3
B1 B3
EN/SS EN/SS
SW3
V IN
SW1
GND
R FB1 =
V VOUT1 + I VOUT1 ? R DISC1 ? 1.22V
13.8 μ A
R FB3 = VOUT3
R VFB3
V FB3
V OUT3
LT3587
CAP1
FB1
V
+ I VOUT3 ? R DISC3 ? 0.8V
14.3 μ A
I FB3
SW2
DN
FB2
V OUT1
R FB1
Fault Detection and Indicator
FLT
CAP3
B1 B3
EN/SS EN/SS
SW3
V IN
SW1
GND
The LT3587 features fault detection on all its outputs and
a fault indicator pin ( FLT ). The fault detection circuitry is
enabled only when at least one of the channels has com-
R VFB3
V FB3
V OUT3
I FB3
SW2
LT3587
DN FB2
CAP1
FB1
V OUT1
R FB1
pleted the soft-start process and is free running with full
inductor current. Once the fault detection is enabled, the
Fault pin pulls low when any of the feedback voltages (V FB1 ,
V FB2 or Max(V VFB3 ,V IFB3 )) fall below their regulation value
3587 F09
Figure 9. Feedback Connection Using the V OUT and CAP Pins
However, in the case of a short-circuit fault at the V OUT
pins, the LT3587 will switch continuously because the FB1
or the V FB3 pin is low. While operating in this open-loop
condition, the rising voltage at the CAP pins is limited
only by the protection circuit of their respective output
disconnects. At the worst case, the CAP pin rises to 10V
above the corresponding V OUT pin. So in the case of short-
circuit fault to ground, the voltage on the CAP pins may
reach 10V. When the short-circuit condition is removed,
the V OUT pins rise up to the voltage on the CAP pins,
potentially exceeding the programmed output voltage until
the capacitor voltages fall back into regulation. While this
is harmless to the LT3587, this should be considered in
the context of the external circuitry if short-circuit events
are expected.
for more than 16ms.
One particularly important case is an overload or short-
circuit condition on any of the channel outputs. In this case,
if the corresponding loop is unable to bring the output
back into regulation within 16ms, a fault is detected and
the Fault pin is pulled low.
Note that the fault condition is latched. Once the Fault pin
is pulled low, all the three channels are disabled. In order
to enable any of the channels again, reset the part by shut-
ting it down and then turning it on again. This is done by
?rst forcing both the EN/SS1 and EN/SS3 pins low below
200mV and then either letting them go high again in a
soft-start process or forcing them high immediately if no
soft-start is desired. Figure 10 shows the waveforms when
a short-circuit condition occurs at Boost1 for more than
16ms as well as the subsequent resetting of the part.
Regulating the CAP pins ensures that the voltage on the
V OUT pins never exceeds the set output voltage after a
short-circuit event. However, this setup does not com-
pensate for the voltage drop across the output disconnect,
resulting in an output voltage that is slightly lower than
the voltage set by the feedback resistor. This voltage drop
is equal to the product of the output current and the on
V FLT
5V/DIV
ENSS1/ENSS3
5V/DIV
V VOUT1
10V/DIV
V NEG
10V/DIV
V VOUT3
20V/DIV
SHORT
AT V OUT1
PART RESET
resistance of the PMOS disconnect transistor. This drop
can be accounted for when using the CAP pin as the
100ms/DIV
3587 F10
feedback node by setting the output voltage according to
the following formula:
Figure 10. Waveforms During Fault
Detection of a Short-Circuit Event
3587fc
15
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