参数资料
型号: LT3640IFE#TRPBF
厂商: Linear Technology
文件页数: 10/24页
文件大小: 0K
描述: IC REG BUCK FIX/ADJ DL 28TSSOP
标准包装: 2,000
类型: 降压(降压)
输出类型: 两者兼有
输出数: 2
输出电压: 1.8V,3.3V,可调
输入电压: 2.5 V ~ 35 V
PWM 型: 电流模式,混合
频率 - 开关: 500kHz ~ 2MHz
电流 - 输出: 1.1A,1.3A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 28-TSSOP 裸露焊盘
LT3640
TIMING DIAGRAMS
Power-On Reset Timing
FB
RST
t UV
t RST
Watchdog Timing
WDI
WDO
t DLY
t < t WD U
t WDU
t < t WDL t RST
t WDL < t < t WDU
t RST
3640 TD
OPERATION
The LT3640 is a dual channel, constant-frequency, current
mode monolithic buck switching regulator with power-on
reset and watchdog timer. Both channels are synchronized
to a single oscillator with frequency set by RT. Operation can
be best understood by referring to the Block Diagram.
Buck Regulators
The high voltage channel is a nonsynchronous buck
regulator that operates from the V IN pin. The start of each
oscillator cycle sets an SR latch and turns on the internal
NPN power switch. An amplifier and comparator monitor
the current flowing between the V IN and SW1 pins, turning
the switch off when this current reaches a level determined
by the voltage at VC1 node. An error amplifier measures
the output voltage through an external resistor divider tied
to the FB1 pin and servos the VC1 node. The reference
of the error amplifier is determined by the lower of the
internal reference and the voltage at the SS1 pin. If the error
amplifier’s output increases, more current is delivered to
the output; if it decreases, less current is delivered.
An active clamp (not shown) on the VC1 node provides
peak current limit. A DA pin current comparator extends
the oscillator cycle until the catch diode current is below
the valley current limit. Both the peak and valley current
limits help to control the inductor current in fault condi-
tions such as shorted output with high V IN . Both current
limits are reduced when the voltage at the FB1 pin is below
0.2V. This current foldback helps to control the inductor
current during start-up and overload.
The NPN power switch driver operates from either the V IN
pin or the BST pin. An external capacitor and diode are
used to generate a voltage between the BST and SW pins.
During the power-up of the LT3640, an internal 5mA current
source charges the external BST capacitor. The regulator
starts switching when the (BST-SW) voltage reaches the
2V threshold. The internal NPN power switch can be fully
saturated for efficient operation when the (BST-SW) volt-
age is between 2.3V and 5.5V.
The low voltage channel is a synchronous buck regulator
that operates from the V IN2 pin. It starts switching only
3640f
 0
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