参数资料
型号: LT3640IFE#TRPBF
厂商: Linear Technology
文件页数: 4/24页
文件大小: 0K
描述: IC REG BUCK FIX/ADJ DL 28TSSOP
标准包装: 2,000
类型: 降压(降压)
输出类型: 两者兼有
输出数: 2
输出电压: 1.8V,3.3V,可调
输入电压: 2.5 V ~ 35 V
PWM 型: 电流模式,混合
频率 - 开关: 500kHz ~ 2MHz
电流 - 输出: 1.1A,1.3A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 28-TSSOP 裸露焊盘
LT3640
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T A = 25°C. V IN = 12V, V IN2 = 3.3V, EN/UVLO = 12V , EN2 = 3.3V, unless otherwise noted.
PARAMETER
SS1, SS2 Charge Current
SS1 to FB1 Offset Voltage
SS2 to FB2 Offset Voltage
RST1 Threshold as Percentage of V FB
RST2 Threshold as Percentage of V FB
CONDITIONS
SS1 = 0.5V, SS2 = 0.5V
SS1 = 0.6V
SS2 = 0.3V
l
l
MIN
1.4
90
89
TYP
1.9
5
5
92
92
MAX
2.5
30
30
94
94
UNITS
μA
mV
mV
%
%
Undervoltage to RST Assert Time
20
μs
RST1 , RST2 , WDO Pull-Up Current
RST1 , RST2 , WDO Output Voltage
RST1 , RST2 , WDO = 0V
I RST1 , I RST2 , I WDO = 2mA
5
15
150
30
250
μA
mV
RST1 , RST2 Timeout Period (t RST )
Watchdog Start Delay Time (t DLY )
Watchdog Upper Boundary (t WDU )
Watchdog Lower Boundary (t WDL )
CPOR = 220pF
CWDT = 820pF
CWDT = 820pF
CWDT = 820pF
l
l
l
8
14
27
1.68
9.5
16
32
2
11
18
35
2.2
ms
ms
ms
ms
WDI Pull-Up Current
WDI = 1.2V
2
μA
WDI Voltage Threshold
WDI Low Minimum Pulse Width
WDI High Minimum Pulse Width
WDE Pull-Down Current
WDE = 2V
0.55
300
300
0.85
1
1.15
V
ns
ns
μA
WDE Threshold
l
0.5
0.7
0.9
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3640E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3640I is guaranteed and tested over the full –40°C to 125°C operating
junction temperature range.
Note 3: SW1, SW2 current limit is guaranteed by design and/or correlation
to static test. Slope compensation reduces current limit at higher duty
cycle.
Note 4: The oscillator cycle is extended when DA current exceeds its limit.
DA current limit is flat over duty cycle.
Note 5: If the SW2 NMOS current exceeds its limit at the start of an
oscillator cycle, the PMOS will not be turned on in the cycle.
Note 6: The QFN switch R DS(ON) is guaranteed by correlation to wafer level
measurement.
Note 7: Absolute maximum voltage at V IN and RUN/SS pin is 55V for
nonrepetitive one second transients, and 36V for continuous operation.
3640f
 
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