参数资料
型号: LT3650IMSE-8.2#PBF
厂商: Linear Technology
文件页数: 17/22页
文件大小: 0K
描述: IC CHARGER LI-ION 8.2V 2A 12MSOP
标准包装: 37
功能: 充电管理
电池化学: 锂离子(Li-Ion)、锂聚合物(Li-Pol)
电源电压: 9 V ~ 32 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 12-TSSOP (0.118",3.00mm 宽)裸露焊盘
供应商设备封装: 12-MSOP,裸露焊盘
包装: 管件
LT3650-8.2/LT3650-8.4
APPLICATIONS INFORMATION
Layout Considerations
The LT3650 switch node has rise and fall times that are
typically less than 10ns to maximize conversion efficiency.
The switched node (Pin SW) trace should be kept as short
as possible to minimize high frequency noise. The input
capacitor (C IN ) should be placed close to the IC to minimize
this switching noise. Short, wide traces on these nodes
also help to avoid voltage stress from inductive ringing.
The BOOST decoupling capacitor should also be in close
proximity to the IC to minimize inductive ringing. The
SENSE and BAT traces should be routed together and
kept as short as possible. Shielding these signals from
switching noise with ground is recommended.
High current paths and transients should be kept iso-
lated from battery ground, to assure an accurate output
voltage reference. Effective grounding can be achieved
by considering switched current in the ground plane,
and careful component placement and orientation can
effectively steer these high currents such that the battery
reference does not get corrupted. Figure 9 illustrates an
effective grounding scheme using component placement
to control ground currents. When the switch is enabled
(loop #1), current flows from the input bypass capacitor
(C IN ) through the switch and inductor to the battery posi-
tive terminal. When the switch is disabled (loop #2), the
current to the battery positive terminal is provided from
ground through the freewheeling Schottky diode (D F ). In
both cases, these switched currents return to ground via
the output bypass capacitor (C BAT ).
The LT3650 packaging has been designed to efficiently
remove heat from the IC via the exposed pad on the
backside of the package, which is soldered to a copper
footprint on the PCB. This footprint should be made as
large as possible to reduce the thermal resistance of the
IC case to ambient air.
1
C IN
V IN
LT3650
2
SW
D F
C BAT
R SENSE
V BAT
+
SENSE
BAT
365082 F09
Figure 9. Component Orientation Isolates High Current Paths From Sensitive Nodes
36508284fd
17
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