参数资料
| 型号： | LT3682IDD#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 17/24页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 1A 12DFN |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 20 V |
| 输入电压： | 3.6 V ~ 36 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 250kHz ~ 2.2MHz |
| 电流 - 输出： | 1A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 12-WFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 12-DFN |
LT3682
APPLICATIONS INFORMATION
capacitor on the V C pin (C C ) integrates the error ampli?er
output current, resulting in two poles in the loop. In most
cases a zero is required and comes from either the output
capacitor ESR or from a resistor R C in series with C C .
This simple model works well as long as the value of the
inductor is not too high and the loop crossover frequency
is much lower than the switching frequency. A phase lead
capacitor (C PL ) across the feedback divider may improve
the transient response. Figure 3 shows the transient
response when the load current is stepped from 300mA
to 650mA and back to 300mA.
V OUT
100mV/DIV
I LOAD
0.5A/DIV
the output power is delivered to the load by the output
capacitor. Because the LT3682 delivers power to the output
with single, low current pulses, the output ripple is kept
below 15mV for a typical application. In addition, V IN and
BD quiescent currents are reduced to typically 35μA and
55μA respectively during the sleep time. As the load current
decreases towards a no load condition, the percentage of
time that the LT3682 operates in sleep mode increases and
the average input current is greatly reduced resulting in
high ef?ciency even at very low loads. (See Figure 4). At
higher output loads (above about 70mA for the front page
application) the LT3682 will be running at the frequency
programmed by the R T resistor, and will be operating in
standard PWM mode. The transition between PWM and
Low Ripple Burst Mode is seamless, and will not disturb
the output voltage.
If low quiescent current is not required, tie SYNC high to
select pulse-skip mode. The bene?t of this mode is that the
LT3682 will enter full frequency standard PWM operation at
a lower output load current than when in Burst Mode. The
front page application circuit will switch at full frequency
20μs/DIV
3682 F03
at output loads higher than about 30mA. The maximum
load current that the LT3682 can supply is reduced when
Figure 3. Transient Load Response of the LT3682.
3.3V OUT Typical Application with V IN = 12V as the
Load Current is Stepped from 300mA to 650mA.
Low Ripple Burst Mode and Pulse-Skip Mode
The LT3682 is capable of operating in either Low Ripple Burst
Mode or Pulse-Skip Mode which are selected using the SYNC
pin. See the Synchronization section for more information.
SYNC is high.
V SW
5V/DIV
I L
0.2A/DIV
V OUT
20mV/DIV
To enhance ef?ciency at light loads, the LT3682 can be
operated in Low Ripple Burst Mode operation which keeps
5μs/DIV
3682 F04
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst Mode
operation, the LT3682 delivers single cycle bursts of current
V IN = 12V; FRONT PAGE APPLICATION
I LOAD = 5mA
Figure 4. Burst Mode Operation
to the output capacitor followed by sleep periods where
3682f
17
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| LT3684EDD#PBF | 功能描述:IC REG BUCK ADJ 2A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
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| LT3684EDD#TRPBF | 功能描述:IC REG BUCK ADJ 2A 10DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
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