参数资料
型号: LT3724IFE#PBF
厂商: Linear Technology
文件页数: 19/26页
文件大小: 0K
描述: IC REG CTRLR BST INV PWM 16TSSOP
标准包装: 95
PWM 型: 电流模式
输出数: 1
频率 - 最大: 225kHz
占空比: 100%
电源电压: 4 V ~ 60 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 管件
LT3724
APPLICATIONS INFORMATION
V IN+
R B
R A
1
3
V IN
SHDN
BOOST
TG
LT3724
SW
16
15
14
C BOOST
M1
C IN
V IN–
L1
R SENSE
+
C SS
R2
R1
R CSS
C C1
R C
C C2
4
5
6
7
8
C SS 17
BURST_EN
V FB
V C
SGND
V CC
PGND
SENSE +
SENSE –
12
11
10
9
C VCC
D2
D3
D1
C OUT
V OUT
3724 F06
Figure 9. LT3724 Layout Diagram (See PCB Layout Checklist).
Minimum On-Time Considerations
(Step-Down Converters)
Minimum on-time (t TG(ON) ) is the least amount of time
that the LT3724 is capable of turning the MOSFET on and
then off again. It is determined by internal timing delays
and the gate charge of the MOSFET. Applications with high
input to output differential voltages operate at low duty
cycles and may approach this minimum on-time, typically
300nS. The LT3724 switching frequency is internally set to
200kHz, therefore, the minimum duty cycle of the MOSFET
switch is 6%. When the duty cycle needs to be less than
6% the output will stay regulated, but cycle skipping may
occur. Cycle skipping results in an increase in inductor
ripple current. If it is important that cycle skipping does
not occur, follow this guideline which takes into account
worst case f SW and t TG(ON) :
V IN(MAX) ≤ 9 ? V OUT
This is only an issue for supplies with V OUT < 7V.
3724fd
19
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