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参数资料
| 型号： | LT3825EFE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 23/32页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBK ISO 16-TSSOP |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 250kHz |
| 占空比： | 88% |
| 电源电压： | 11 V ~ 18 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 包装： | 带卷 (TR) |
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LT3825
APPLICATIONS INFORMATION
Q B – Q A
V DS
Q A Q B
V IN(MAX) ?
? R DR ?
? f OSC
C MILLER iscalculatedfromthegatechargecurveincluded
on most MOSFET data sheets (Figure 6).
The flat portion of the curve is the result of the Miller
(gate-to-drain) capacitance as the drain voltage drops.
The Miller capacitance is computed as:
C MILLER =
The curve is done for a given V DS . The Miller capacitance
for different V DS voltages are estimated by multiplying the
computed C MILLER by the ratio of the application V DS to
the curve specified V DS .
MILLER EFFECT
V GS
a b
3825 F06
GATE CHARGE (Q G )
Figure 6. Gate Charge Curve
With C MILLER determined, calculate the primary-side power
MOSFET power dissipation:
P DPRI = I RMS(PRI)2 ? R DS(ON) ( 1 + δ ) +
P IN(MAX) C MILLER
DC MIN V GATE(MAX) – V TH
where:
R DR is the gate driver resistance (≈10Ω)
V TH is the MOSFET gate threshold voltage
f OSC is the operating frequency
V GATE(MAX) = 7.5V for this part
(1 + δ ) is generally given for a MOSFET in the form of a
normalized R DS(ON) vs temperature curve. If you don’t have
a curve, use δ = 0.005/°C ? ? T for low voltage MOSFETs.
The secondary-side power MOSFETs typically operate
at substantially lower V DS , so you can neglect transition
losses. The dissipation is calculated using:
P D(SEC) = I RMS(SEC)2 ? R DS(ON) (1 + δ )
With power dissipation known, the MOSFETs’ junction
temperatures are obtained from the equation:
T J = T A + P D ? θ JA
where T A is the ambient temperature and θ JA is the MOSFET
junction-to-ambient thermal resistance.
Once you have T J , iterate your calculations recomputing
δ and power dissipations until convergence.
Gate Drive Node Consideration
The PG and SG gate drivers are strong drives to minimize
gate drive rise and fall times. This improves efficiency
but the high frequency components of these signals can
cause problems. Keep the traces short and wide to reduce
parasitic inductance.
The parasitic inductance creates an LC tank with the
MOSFET gate capacitance. In less than ideal layouts, a
series resistance of 5Ω or more may help to dampen the
ringing at the expense of slightly slower rise and fall times
and efficiency.
The LT3825 gate drives will clamp the max gate voltage
to roughly 7.4V, so you can safely use MOSFETs with max
V GS of 10V or larger.
Synchronous Gate Drive
There are several different ways to drive the synchronous
gate MOSFET. Full converter isolation requires the synchro-
nous gate drive to be isolated. This is usually accomplished
by way of a pulse transformer. Usually the pulse driver is
used to drive a buffer on the secondary as shown in the
application on the front page of this data sheet.
However, other schemes are possible. There are gate
drivers and secondary side synchronous controllers avail-
able that provide the buffer function as well as additional
features.
3825fe
23
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| LT3837EFE#PBF | 功能描述:IC REG CTRLR FLYBK ISO 16-TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 特色产品:LM3753/54 Scalable 2-Phase Synchronous Buck Controllers 标准包装:1 系列:PowerWise® PWM 型:电压模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.5 V ~ 18 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-5°C ~ 125°C 封装/外壳:32-WFQFN 裸露焊盘 包装:Digi-Reel® 产品目录页面:1303 (CN2011-ZH PDF) 其它名称:LM3754SQDKR |
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