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参数资料
| 型号： | LT3845IFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 16TSSOP |
| 标准包装： | 95 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 500kHz |
| 电源电压： | 4 V ~ 60 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 包装： | 管件 |
LT3845
PIN FUNCTIONS
BG: The BG pin is the gate drive for the bottom N-channel
MOSFET. Since very fast high currents are driven from
this pin, connect it to the gate of the power MOSFET
with a short and wide, typically 0.02" width, PCB trace to
minimize inductance.
BOOST: The BOOST pin is the supply for the bootstrapped
gate drive and is externally connected to a low ESR ceramic
boost capacitor referenced to SW pin. The recommended
value of the BOOST capacitor, C BOOST , is at least 50 times
greater than the total gate capacitance of the topside MOSFET.
In most applications 0.1μF is adequate. The maximum volt-
age that this pin sees is V IN + V CC , ground referred.
BURST_EN: Burst Mode Operation Enable Pin. This pin
also controls reverse-current inhibit mode of operation.
When the pin voltage is below 0.5V, Burst Mode operation
and reverse-current inhibit functions are enabled. When
the pin voltage is above 0.5V, Burst Mode operation is dis-
abled, but reverse-current inhibit operation is maintained.
In this mode of operation (BURST_EN = V FB ) there is a
1mA minimum load requirement. Reverse-current inhibit
is disabled when the pin voltage is above 2.5V. This pin is
typically shorted to ground to enable Burst Mode operation
and reverse-current inhibit, shorted to V FB to disable Burst
Mode operation while enabling reverse-current inhibit,
and connected to V CC pin to disable both functions. See
Applications Information section.
C SS : The soft-start pin is used to program the supply soft-
start function. Use the following formula to calculate C SS
for a given output voltage slew rate:
C SS = 2μA(t SS /1.231V)
The pin should be left unconnected when not using the
soft-start function.
f SET : The f SET pin programs the oscillator frequency with an
external resistor, R SET . The resistor is required even when
supplying external sync clock signal. See the Applications
Information section for resistor value selection details.
PGND: The PGND pin is the high-current ground reference
for internal low side switch driver and the V CC regulator
circuit. Connect the pin directly to the negative terminal of
the V CC decoupling capacitor. See the Application Informa-
tion section for helpful hints on PCB layout of grounds.
SENSE – : The SENSE – pin is the negative input for the
current sense ampli?er and is connected to the V OUT
side of the sense resistor for step-down applications. The
sensed inductor current limit is set to ±100mV across the
SENSE inputs.
SENSE + : The SENSE + pin is the positive input for the
current sense ampli?er and is connected to the inductor
side of the sense resistor for step-down applications. The
sensed inductor current limit is set to ±100mV across the
SENSE inputs.
SGND: The SGND pin is the low noise ground reference.
It should be connected to the –V OUT side of the output
capacitors. Careful layout of the PCB is necessary to keep
high currents away from this SGND connection. See the
Application Information section for helpful hints on PCB
layout of grounds.
SHDN : The SHDN pin has a precision IC enable threshold
of 1.35V (rising) with 120mV of hysteresis. It is used to
implement an undervoltage lockout (UVLO) circuit. See
Application Information section for implementing a UVLO
function. When the SHDN pin is pulled below a transistor
V BE (0.7V), a low current shutdown mode is entered, all
internal circuitry is disabled and the V IN supply current
is reduced to approximately 9μA. Typical pin input bias
current is <10nA and the pin is internally clamped to 6V.
If the function is not used, this pin may be tied to V IN
through a high value resistor.
SW: Reference for V BOOST Supply and High Current Return
for Bootstrapped Switch.
SYNC: The Sync pin provides an external clock input for
synchronization of the internal oscillator. R SET is set such
that the internal oscillator frequency is 10% to 25% below
the external clock frequency. If unused the Sync pin is
connected to SGND. For more information see “Oscillator
Sync” in the Application Information section of this data
sheet. Sync pin not available in PDIP package.
3845fd
7
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LT3845IFETRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:High Voltage Synchronous Current Mode Step-Down Controller with Adjustable Operating Frequency |
| LT3845IFE-TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:High Voltage Synchronous Current Mode Step-Down Controller with Adjustable Operating Frequency |
| LT3845MPFE | 制造商:Linear Technology 功能描述:Step Down Controller 16-Pin TSSOP EP 制造商:Linear Technology 功能描述:HIGH VOLTAGE SYNCHRONOUSCURRENT MODE STEP-DOWNCONTROLLER WITH ADJUSTABLEOPERATING FREQUENCY |
| LT3845MPFE#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,000 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:50% 电源电压:9 V ~ 10 V 降压:无 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:8-TSSOP（0.173"，4.40mm 宽） 包装:带卷 (TR) |
| LT3845MPFE#PBF | 制造商:Linear Technology 功能描述:IC SYNC STEP-DOWN CONTROLLER 16-TSSOP |
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