参数资料
型号: LT8582IDKD#TRPBF
厂商: Linear Technology
文件页数: 24/36页
文件大小: 0K
描述: IC REG MULTI CONFIG ADJ 3A 24DFN
标准包装: 2,500
类型: 升压(升压),反相,回扫,Sepic
输出类型: 可调式
输出数: 2
输出电压: 最高 42V
输入电压: 2.5 V ~ 22 V
PWM 型: 电流模式
频率 - 开关: 200kHz ~ 2.5MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 24-DFN(7x4)
LT8582
APPENDIX
use a toroidal or shielded inductor. See Table 5 for a list
of inductor manufacturers.
where
L BOOST = L1 for boost topologies (see Figure 5)
Table 5. Inductor Manufacturers
Coilcraft MSD7342
XAL6060 Series
www.coilcraft.com
L DUAL = L1 = L2 for coupled dual inductor topologies
(see Figures 6 and 7)
Vishay
IHLP-2020BZ-01
IHLP-2525CZ-01
Series
www.vishay.com
L DUAL = L1 || L2 for uncoupled dual inductor
topologies (see Figures 6 and 7)
WüRTH
WE-PD
www.we-online.com
DC
= Switch duty cycle (see Power Switch Duty
WE-DD
WE-TDC Series
Cycle section in Appendix)
Cooper Bussman
Sumida
Taiyo Yuden
TDK
Octa-Pac Plus
DRQ-125
DRQ-74 Series
CDR6D28MN
CDR7D28MN
Series
NR Series
VLF, SLF, RLF
www.cooperbussmann.com
www.sumida.com
www.t-yuden.com
www.tdk.com
I PK
η
= Maximum Peak Switch Current; should not
exceed 3A for a combined SWA + SWB
current, or 1.7A if only SWA is being used.
= Power conversion efficiency (typically 88%
for boost and 82% for dual inductor
topologies at high currents)
Series
Minimum Inductance
f OSC
I OUT
= Switching frequency
= Maximum load current
DC (V IN – V CESAT )
I PK – OUT
Topology
L MIN >
Although there can be a trade-off with efficiency, it is
often desirable to minimize board space by choosing
smaller inductors. When choosing an inductor, there are
three conditions that limit the minimum inductance: (1)
providing adequate load current, (2) avoiding subharmonic
oscillation and (3) supplying a minimum ripple current to
avoid false tripping of the current comparator.
Adequate Load Current
Small value inductors result in increased ripple currents
and thus, due to the limited peak switch current, decrease
the average current that can be provided to the load. In
order to provide adequate load current, L should be at least:
L BOOST Boost
V    I OUT
2 f OSC
V IN
or
Negative values of L BOOST or L DUAL indicate that the
output load current I OUT exceeds the switch current limit
capability of the LT8582.
Avoiding Subharmonic Oscillations
Subharmonic oscillations can occur when the duty cycle is
greater than 50%. The LT8582’s internal slope compensa-
tion circuit will avoid this, provided that the inductance
exceeds a certain minimum value. In applications that
operate with duty cycles greater than 50%, the inductance
must be at least:
(V IN – V CESAT ) ? (2 ? DC – 1)
1.7A ? f OSC ? (1 – DC)
where
L MIN = L1 for boost topologies (see Figure 5)
L MIN = L1 = L2 for coupled dual inductor topologies
(see Figures 6 and 7)
2 f OSC I PK –
L DUAL
DC (V IN – V CESAT )
|V OUT | I OUT
V IN
I OUT
SEPIC or
Inverting
Topologies
L MIN = L1 || L2 for uncoupled dual inductor topologies
(see Figures 6 and 7)
8582f
24
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