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参数资料
| 型号： | LTC1092ACN8#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 16/32页 |
| 文件大小： | 0K |
| 描述： | IC DAS SERIAL I/O 1CH 10BIT 8DIP |
| 标准包装： | 50 |
| 类型： | 数据采集系统（DAS），ADC |
| 分辨率（位）： | 10 b |
| 数据接口： | 串行 |
| 电压电源： | 双 ± |
| 电源电压： | ±5V，4.5V，10V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-PDIP |
| 包装： | 管件 |
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23
LTC1091/LTC1092
LTC1093/LTC1094
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
Figure 10. Poor Op Amp Settling Can Cause A/D Errors
Figure 9. Adequate Settling of Op Amp Driving Analog Input
5mV/DIV
1
s/DIV
1091-4 F09
5mV/DIV
20
s/DIV
1091-4 F10
RC Input Filtering
It is possible to filter the inputs with an RC network as
shown in Figure 11. For large values of CF (e.g., 1F), the
capacitive input switching currents are averaged into a net
DC current. Therefore, a filter should be chosen with a small
resistor and large capacitor to prevent DC drops across the
resistor. The magnitude of the DC current is approximately
IDC = (60pF)(VIN/tCYC) and is roughly proportional to VIN.
When running at the minimum cycle time of 32
s, the input
current equals 9
A at VIN = 5V. In this case, a filter resistor
of 50
will cause 0.1LSB of full-scale error. If a larger filter
resistor must be used, errors can be eliminated by increas-
ing the cycle time as shown in the typical curve of Maximum
Filter Resistor vs Cycle Time.
Input Leakage Current
Input leakage currents can also create errors if the source
resistance gets too large. For instance, the maximum input
leakage specification of 1
A (at 125°C) flowing through a
source resistance of 1k
will cause a voltage drop of 1mV
or 0.2LSB. This error will be much reduced at lower
temperatures because leakage drops rapidly (see the
typical curve of Input Channel Leakage Current vs
Temperature).
4. Sample-and-Hold
Single-Ended Inputs
The LTC1091/LTC1093/LTC1094 provide a built-in sample-
and-hold (S&H) function for all signals acquired in the single-
ended mode. This sample-and-hold allows conversion of
rapidly varying signals (see typical curve of S&H Acquisition
Time vs Source Resistance). The input voltage is sampled
during the tSMPL time as shown in Figure 8. The sampling
interval begins as the bit preceding the MSBF bit is shifted in
and continues until the falling CLK edge after the MSBF bit is
received. On this falling edge, the S&H goes into hold mode
and the conversion begins.
Figure 11. RC Input Filtering
RFILTER
VIN
CFILTER
1091-4 F11
LTC1091
“+”
“–”
IDC
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC1092AMJ8 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 10-Bit |
| LTC1092AMJ8/883 | 制造商:Linear Technology 功能描述: |
| LTC1092C | 制造商:LINER 制造商全称:Linear Technology 功能描述:1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems |
| LTC1092CJ8 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 10-Bit |
| LTC1092CN8 | 功能描述:IC DAS SERIAL I/O 1CH 10BIT 8DIP RoHS:否 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:数据采集系统（DAS） 分辨率（位）:16 b 采样率（每秒）:21.94k 数据接口:MICROWIRE?，QSPI?，串行，SPI? 电压电源:模拟和数字 电源电压:1.8 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（6x6） 包装:托盘 |
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