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参数资料
| 型号： | LTC1649CS#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 16-SOIC |
| 标准包装： | 50 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 260kHz |
| 占空比： | 93% |
| 电源电压： | 2.7 V ~ 5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 包装： | 管件 |
LTC1649
PI N FU N CTIO N S
G1 (Pin 1): Driver Output 1. Connect this pin to the gate of
the upper N-channel MOSFET, Q1. This output will swing
from P VCC1 to GND. G1 will always be low when G2 is high.
In shutdown, G1 and G2 go low.
P VCC1 (Pin 2): Power V CC for Driver 1. This is the power
supply input for G1. G1 will swing from P VCC1 to GND.
P VCC1 must be connected to a potential of at least V IN +
V GS(ON) (Q1). This potential can be generated using a
simple charge pump connected to the switching node
between the two external MOSFETs as shown in Figure 1.
GND (Pin 3): System Ground. Connect to a low impedance
ground in close proximity to the source of Q2. The system
signal and power grounds should meet at only one point,
at the GND pin of the LTC1649.
FB (Pin 4): Feedback. The FB pin is connected to the output
through a resistor divider to set the output voltage.
V OUT = V REF [1 + (R1/R2)].
SHDN (Pin 5): Shutdown, Active Low. A TTL compatible
LOW level at SHDN for more than 50 μ s puts the LTC1649
into shutdown mode. In shutdown, G1, G2, COMP and SS
go low, and the quiescent current drops to 25 μ A max.
CP OUT remains at 5V in shutdown mode. A TTL compatible
HIGH level at SHDN allows the LTC1649 to operate nor-
mally.
SS (Pin 6): Soft Start. An external capacitor from SS to
GND controls the startup time and also compensates the
current limit loop, allowing the LTC1649 to enter and exit
current limit cleanly.
V IN (Pin 7): Charge Pump Input. This is the main low
voltage power supply input. V IN requires an input voltage
between 3V and 5V. Bypass V IN to ground with a 1 μ F
ceramic capacitor located close to the LTC1649.
C – (Pin 8): Flying Capacitor, Negative Terminal. Connect
a 1 μ F ceramic capacitor from C – to C + .
C + (Pin 9): Flying Capacitor, Positive Terminal.
CP OUT (Pin 10): Charge Pump Output. CP OUT provides a
regulated 5V output to provide power for the internal
switching circuitry and gate drive for the external MOSFETs.
CP OUT should be connected directly to P VCC2 in most
applications. At least 10 μ F of reservoir capacitance to
ground is required at CP OUT . This requirement can usually
be met by the bypass capacitor at P VCC2 .
COMP (Pin 11): External Compensation. The COMP pin is
connected directly to the output of the internal error
amplifier and the input of the PWM generator. An RC
network is used at this node to compensate the feedback
loop to provide optimum transient response.
I MAX (Pin 12): Current Limit Set. I MAX sets the threshold
for the internal current limit comparator. If I FB drops below
I MAX with G1 on, the LTC1649 will go into current limit.
I MAX has an internal 12 μ A pull-down to GND. The voltage
at I MAX can be set with an external resistor to the drain of
Q1 or with an external voltage source.
I FB (Pin 13): Current Limit Sense. Connect to the switched
node at the source of Q1 and the drain of Q2 through a 1k ?
resistor. The resistor is required to prevent voltage tran-
sients at the switched node from damaging the I FB pin. I FB
can be taken up to 18V above GND without damage.
V CC (Pin 14): Internal Power Supply. V CC provides power
to the feedback amplifier and switching control circuits.
V CC is designed to run from the 5V supply provided by
CP OUT . V CC requires a 10 μ F bypass capacitor to GND.
P VCC2 (Pin 15): Power V CC for Driver 2. This is the power
supply input for G2. G2 will swing from P VCC2 to GND.
P VCC2 must be connected to a potential of at least
V GS(ON) (Q2). This voltage is usually supplied by the CP OUT
pin. P VCC2 requires a bypass capacitor to GND; this
capacitor also provides the reservoir capacitance required
by the CP OUT pin.
G2 (Pin 16): Driver Output 2. Connect this pin to the gate
of the lower N-channel MOSFET, Q2. This output will
swing from P VCC2 to GND. G2 will always be low when G1
is high. In shutdown, G1 and G2 go low.
4
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