参数资料
型号: LTC1703IG#TRPBF
厂商: Linear Technology
文件页数: 28/36页
文件大小: 0K
描述: IC REG SW DUAL SYNC VID 28SSOP
标准包装: 2,000
应用: 控制器,移动式 Intel Pentium? III
输入电压: 3 V ~ 7 V
输出数: 2
输出电压: 0.9 V ~ 2 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
供应商设备封装: 28-SSOP
包装: 带卷 (TR)
LTC1703
APPLICATIO S I FOR ATIO
discontinuous mode happens when Burst Mode operation
is invoked. At typical power levels, when Burst Mode
operation is activated, gate drive is the dominant loss
term. Burst Mode operation turns off all output switching
for several clock cycles in a row, significantly cutting gate
drive losses. As the load current in Burst Mode operation
falls toward zero, the current drawn by the circuit falls to
the LTC1703’s background quiescent level—about 3mA
per channel.
To maximize low load efficiency, make sure the LTC1703
is allowed to enter discontinuous and Burst Mode opera-
tion as cleanly as possible. FCB must be above its 0.8V
threshold. Minimize ringing at the SW node so that the
discontinuous comparator leaves as little residual current
in the inductor as possible when QB turns off. It helps to
connect the SW pin of the LTC1703 as close to the drain
of QB as possible. An RC snubber network can also be
added from SW to PGND.
REGULATION OVER COMPONENT TOLERANCE/
TEMPERATURE
DC Regulation Accuracy
The LTC1703 initial DC output accuracy depends mainly
on internal reference accuracy, op amp offset and external
resistor accuracy (side 2 only). Two LTC1703 specs come
into play: feedback voltage and feedback voltage line
regulation. The feedback voltage spec is 800mV ± 8mV
over the full temperature range, and is specified at the FB
pin, which encompasses both reference accuracy and any
op amp offset. This accounts for 1% error at the output
with a 5V input supply. The feedback voltage line regula-
tion spec adds an additional 0.05%/V term that accounts
for change in reference output with change in input supply
voltage. With a 5V supply, the errors contributed by the
LTC1703 itself add up to no more than 1.5% DC error at the
output.
At side 2, the output voltage setting resistors (R1 and R B
in Figure 3) are the other major contributor to DC error. At
a typical 1.xV output voltage, the resistors are of roughly
the same value, which tends to halve their error terms,
improving accuracy. Still, using 1% resistors for R1 and
R B will add 1% to the total output error budget, equal to
that of all errors due to the LTC1703 combined. Using 0.1%
resistors in just those two positions can nearly halve the DC
output error for very little additional cost. Side 1 uses the
internal VID network to set the output voltage, and is
specified to be within ± 1.5% of the values shown in
Table 1.
Load Regulation
Load regulation is affected by feedback voltage, feedback
amplifier gain and external ground drops in the feedback
path. Feedback voltage is covered above and is within 1%
over temperature. A full-range load step might require a
10% duty cycle change to keep the output constant,
requiring the COMP pin to move about 100mV. With
amplifier gain at 85dB, this adds up to only a 10 μ V shift at
FB, negligible compared to the reference accuracy terms.
External ground drops aren’t so negligible. The LTC1703
can sense the positive end of the output voltage by
attaching the feedback resistor directly at the load, but it
cannot do the same with the ground lead. Just 0.001 ? of
resistance in the ground lead at 10A load will cause a 10mV
error in the output voltage —as much as all the other DC
errors put together. Proper layout becomes essential to
achieving optimum load regulation from the LTC1703. A
properly laid out LTC1703 circuit should move less than a
millivolt at the output from zero to full load.
TRANSIENT RESPONSE
Transient response is the other half of the regulation
equation. The LTC1703 can keep the DC output voltage
constant to within 1% when averaged over hundreds of
cycles. Over just a few cycles, however, the external
components conspire to limit the speed that the output
can move. Consider our typical 5V to 1.5V circuit, sub-
jected to a 1A to 5A load transient. Initially, the loop is in
regulation and the DC current in the output capacitor is
zero. Suddenly, an extra 4A start flowing out of the output
capacitor while the inductor is still supplying only 1A. This
sudden change will generate a (4A)(C ESR )voltage step at
the output; with a typical 0.015 ? output capacitor ESR,
this is a 60mV step at the output, or 4% (for a 1.5V output
voltage).
1703fa
28
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