参数资料
型号: LTC1736IG#TR
厂商: Linear Technology
文件页数: 21/28页
文件大小: 0K
描述: IC REG SW SYNC STEPDWN HE 24SSOP
标准包装: 1,800
应用: 转换器,Intel Pentium? II,III
输入电压: 3.5 V ~ 36 V
输出数: 1
输出电压: 0.93 V ~ 2 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 带卷 (TR)
LTC1736
APPLICATIO S I FOR ATIO
0.06 ? . This results in losses ranging from 3% to 17%
as the output current increases from 1A to 5A for a 1.8V
output, or 4% to 20% for a 1.5V output. Efficiency
varies as the inverse square of V OUT for the same
external components and power level. I 2 R losses cause
the efficiency to drop at high output currents.
4. Transition losses apply only to the topside MOSFET(s),
and only become significant when operating at high
input voltages (typically 12V or greater). Transition
losses can be estimated from:
Transition Loss = (1.7)(V IN2 )(I O(MAX) )(C RSS )(f)
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% efficiency degradation in portable systems. It is very
important to include these “system” level losses in the
design of a system. The internal battery and fuse resis-
tance losses can be minimized by making sure that C IN has
adequate charge storage and very low ESR at the switch-
ing frequency. A 25W supply will typically require a
minimum of 20 μ F to 40 μ F of capacitance having a maxi-
mum of 0.01 ? to 0.02 ? of ESR. Other losses including
Schottky conduction losses during dead-time and induc-
tor core losses generally account for less than 2% total
additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, V OUT shifts by an
amount equal to ? I LOAD (ESR), where ESR is the effective
series resistance of C OUT . ? I LOAD also begins to charge or
discharge C OUT generating the feedback error signal that
forces the regulator to adapt to the current change and
return V OUT to its steady-state value. During this recovery
time V OUT can be monitored for excessive overshoot or
ringing, which would indicate a stability problem. OPTI-
LOOP compensation allows the transient response to be
optimized over a wide range of output capacitance and
ESR values. The availability of the I TH pin not only allows
optimization of control loop behavior but also provides a
DC coupled and AC filtered closed-loop response test
point. The DC step, rise time and settling at this test point
truly reflects the closed-loop response. Assuming a pre-
dominantly second order system, phase margin and/or
damping factor can be estimated using the percentage of
overshoot seen at this pin. The bandwidth can also be
estimated by examining the rise time at the pin. The I TH
external components shown in the Figure 1 circuit will
provide an adequate starting point for most applications.
The I TH series R C -C C filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the final PC layout is done and the
particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
feedback factor gain and phase. An output current pulse of
20% to 100% of full-load current having a rise time of 1 μ s
to 10 μ s will produce output voltage and I TH pin waveforms
that will give a sense of the overall loop stability without
breaking the feedback loop. The initial output voltage step
may not be within the bandwidth of the feedback loop, so
the standard second-order overshoot/DC ratio cannot be
used determine phase margin. The gain of the loop will be
increased by increasing R C and the bandwidth of the loop
will be increased by decreasing C C . If R C is increased by the
same factor that C C is decreased, the zero frequency will
be kept the same, thereby keeping the phase the same in
the most critical frequency range of the feedback loop. The
output voltage settling behavior is related to the stability of
the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to Application Note 76.
Improve Transient Response and Reduce Output
Capacitance with Active Voltage Positioning
Fast load transient response, limited board space and low
cost are requirements of microprocessor power supplies.
Active voltage positioning improves transient response
and reduces the output capacitance required to power a
microprocessor where a typical load step can be from 0.2A
21
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