参数资料
| 型号： | LTC1736IG#TR |
| 厂商： | Linear Technology |
| 文件页数： | 9/28页 |
| 文件大小： | 0K |
| 描述： | IC REG SW SYNC STEPDWN HE 24SSOP |
| 标准包装： | 1,800 |
| 应用： | 转换器，Intel Pentium? II，III |
| 输入电压： | 3.5 V ~ 36 V |
| 输出数： | 1 |
| 输出电压： | 0.93 V ~ 2 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 带卷 (TR) |
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LTC1736
OPERATIO
(Refer to Functional Diagram)
The main control loop is shut down by pulling Pin 2 (RUN/
SS) low. Releasing RUN/SS allows an internal 1.2 μ A
current source to charge soft-start capacitor C SS . When
C SS reaches 1.5V, the main control loop is enabled with the
I TH voltage clamped at approximately 30% of its maximum
value. As C SS continues to charge, I TH is gradually re-
leased allowing normal operation to resume. If V OUT has
not reached 70% of its final value when C SS has charged
to 4.1V, latchoff can be invoked as described in the
Applications Information section.
The internal oscillator can be synchronized to an external
clock applied to the FCB pin and can lock to a frequency
between 90% and 130% of its nominal rate set by capaci-
tor C OSC .
An overvoltage comparator OV guards against transient
overshoots (> 7.5%) as well as other more serious condi-
tions that may overvoltage the output. In this case, the top
MOSFET is turned off and the bottom MOSFET is turned on
until the overvoltage condition is cleared.
Foldback current limiting for an output shorted to ground
is provided by amplifier A. As V FB drops below 0.6V, the
buffered I TH input to the current comparator is gradually
pulled down to a 0.86V clamp. This reduces peak inductor
current to about 1/4 of its maximum value.
Low Current Operation
The LTC1736 has three low current modes controlled by
the FCB pin. Burst Mode operation is selected when the
FCB pin is above 0.8V (typically tied to INTV CC ). During
Burst Mode operation, if the error amplifier drives the I TH
voltage below 0.86V, the buffered I TH input to the current
comparator will be clamped at 0.86V. The inductor current
peak is then held at approximately 20mV/R SENSE (about 1/
4 of maximum output current). If I TH then drops below
0.5V, the Burst Mode comparator B will turn off both
MOSFETs to maximize efficiency. The load current will be
supplied solely by the output capacitor until I TH rises
above the 60mV hysteresis of the comparator and switch-
ing is resumed. Burst Mode operation is disabled by
comparator F when the FCB pin is brought below 0.8V.
This forces continuous operation and can assist second-
ary winding regulation.
When the FCB pin is driven by an external oscillator, a low
noise cycle-skipping mode is invoked and the internal
oscillator is synchronized to the external clock by com-
parator C. In this mode the 25% minimum inductor
current clamp is removed, providing constant frequency
discontinuous operation over the widest possible output
current range. This constant frequency operation is not
quite as efficient as Burst Mode operation, but provides a
lower noise, constant frequency spectrum.
The FCB pin is tied to ground when forced continuous
operation is desired. This operation is the least efficient
mode, but is desirable in certain applications. The output
can source or sink current in this mode. When sinking
current while in forced continuous operation, current will
be forced back into the main power supply potentially
boosting the input supply to dangerous voltage levels—
BEWARE.
Foldback Current, Short-Circuit Detection
and Short-Circuit Latchoff
The RUN/SS capacitor, C SS , is used initially to limit the
inrush current of the switching regulator. After the con-
troller has been started and been given adequate time to
charge up the output capacitors and provide full load
current, C SS is used as a short-circuit time-out circuit. If
the output voltage falls to less than 70% of its nominal
output voltage, C SS begins discharging on the assumption
that the output is in an overcurrent and/or short-circuit
condition. If the condition lasts for a long enough period
as determined by the size of the C SS , the controller will be
shut down until the RUN/SS pin voltage is recycled. This
built-in latchoff can be overridden by providing a current
> 5 μ A at a compliance of 5V to the RUN/SS pin. This
current shortens the soft-start period but also prevents net
discharge of C SS during an overcurrent and/or short-
circuit condition. Foldback current limiting is activated
when the output voltage falls below 70% of its nominal
level whether or not the short-circuit latchoff circuit is
enabled.
9
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| 1210-393K | COIL 39.0UH FERRITE SMD |
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| 1210-273K | COIL 27.0UH FERRITE SMD |
| LTC1736IG | IC REG SW SYNC STEPDWN HE 24SSOP |
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