参数资料
| 型号： | LTC1736IG#TR |
| 厂商： | Linear Technology |
| 文件页数： | 25/28页 |
| 文件大小： | 0K |
| 描述： | IC REG SW SYNC STEPDWN HE 24SSOP |
| 标准包装： | 1,800 |
| 应用： | 转换器，Intel Pentium? II，III |
| 输入电压： | 3.5 V ~ 36 V |
| 输出数： | 1 |
| 输出电压： | 0.93 V ~ 2 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 带卷 (TR) |
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LTC1736
APPLICATIO S I FOR ATIO
12V
50A I PK RATING
V IN
in: R DS(ON) = 0.03 ? , C RSS = 80pF. At maximum input
voltage with T(estimated) = 50 ° C:
TRANSIENT VOLTAGE
( ) [ ] ) C ° ( ) ?
P MAIN =
1 + ( 0 . 005 )( 50 ° C – 25 0 . 03
+ 1 . 7 ( ) ( )( ) ( )
LTC1736
SUPPRESSOR
GENERAL INSTRUMENT
1.5KA24A
1736 F09
Figure 9. Plugging into the Cigarette Lighter
Design Example
As a design example, assume V IN = 12V(nominal), V IN =
22V(max), V OUT = 1.6V(nominal), 1.8V to 1.3V range, I MAX
= 12A and f = 275kHz. R SENSE and C OSC can immediately
1 .6 V 2
12
22 V
2
22 V 12 A 80 pF 275 kHz
= 571 mW
Because the duty cycle of the bottom MOSFET is much
greater than the top, two larger MOSFETs must be paral-
leled. Choosing Fairchild FDS6680A MOSFETs yields a
parallel R DS(ON) of 0.0065 ? . The total power dissipaton
for both bottom MOSFETs, again assuming T = 50 ° C, is:
P SYNC =
( ) ( ) . 1 1 ( ) ?
be calculated:
R SENSE = 50mV/12A = 0.0042 ?
C OSC = 1.61(10 7 )/(275kHz) – 11pF = 47pF
22 V – 1 .6 V
22 V
= 955 mW
2
12 A 0 . 0065
? I L = OUT ? 1 – OUT ?
Assumea1.2μHinductorandchecktheactualvalueofthe
ripple current. The following equation is used :
V ? V ?
( f )( L ) ? V IN ?
The highest value of the ripple current occurs at the
maximum input and output voltages:
Thanks to current foldback, the bottom MOSFET dissipaton
in short circuit will be less than under full-load conditions.
C IN is chosen for an RMS current rating of at least 6A at
temperature. C OUT is chosen with an ESR of 0.01 ? for low
output ripple. The output ripple in continuous mode will be
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
? 1 –
? = 5 A
? I L =
1 . 8 V ?
275 kHz ( 1 . 2 μ H ) ?
1 . 8 V ?
22 V ?
V ORIPPLE = R ESR ( ? I L ) = 0.01 ? (5A) = 50mV P-P
PC Board Layout Checklist
The maximum ripple current is 42% of maximum output
current, which is about right.
Next, verify the minimum on-time of 200ns is not violated.
The minimum on-time occurs at maximum V IN and mini-
mum V OUT .
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1736. These items are also illustrated graphically in
the layout diagram of Figure 10. Check the following in
your layout:
1. Are the signal and power grounds segregated? The
()
t ON ( MIN ) =
V OUT
V IN ( MAX ) f
=
1 . 3 V
22 V ( 275 kHz )
= 215 ns
LTC1736 PGND pin should tie to the GND plane close to
the input capacitor. The SGND pin should then connect
to PGND and all components that connect to SGND
should make a single point tie to the SGND pin. The low
The power dissipation on the topside MOSFET can be
easily estimated. Choosing a Fairchild FDS6612A results
side FET source pins should connect directly to the
input capacitor ground.
25
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