参数资料
型号: LTC1753CSW#TR
厂商: Linear Technology
文件页数: 3/24页
文件大小: 0K
描述: IC REG SW 5BIT PROG SYNC 20SOIC
标准包装: 1,000
应用: 控制器,Intel Pentium? III
输入电压: 5V
输出数: 1
输出电压: 1.3 V ~ 3.5 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
供应商设备封装: 20-SOIC
包装: 带卷 (TR)
LTC1753
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at T A = 25 ° C.
V CC = 5V, PV CC = 12V, unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
G ERR
Error Amplifier Open-Loop DC Gain
(Note 7)
q
40
54
dB
g mERR
Error Amplifier Transconductance
(Note 7)
q
0.9
1.6
2.3
millimho
BW ERR
Error Amplifier – 3dB Bandwidth
COMP = Open (Note 11)
400
kHz
I IMAX
I SS
I SSIL
I MAX Sink Current
Soft-Start Source Current
Maximum Soft-Start Sink Current
V IMAX = V CC
V SS = 0V, V IMAX = 0V, V IFB = V CC
V SENSE = V OUT , V IMAX = V CC , V IFB = 0V
q
q
q
150
– 16
30
190
– 12
60
230
–8
150
μ A
μ A
μ A
Under Current Limit
(Notes 8, 9), V SS = V CC
I SSHIL
Soft-Start Sink Current Under Hard
V SENSE = 0V, V IMAX = V CC , V IFB = 0V
q
20
45
mA
Current Limit
t SSHIL
Hard Current Limit Hold Time
V SENSE = 0V, V IMAX = 4V, V IFB ↓ from 5V
500
μ s
t PWRGD
t PWRBAD
t FAULT
V OTDD
V SHDN
t r , t f
t NOL
Power Good Response Time ↑
Power Good Response Time ↓
FAULT Response Time
Overtemperature Driver Disable
Shutdown
Driver Rise and Fall Time
Driver Nonoverlap Time
V SENSE ↑ from 0V to Rated V OUT
V SENSE ↓ from Rated V OUT to 0V
V SENSE ↑ from Rated V OUT to V CC
OUTEN ↓ , VID0 to VID4 = 0 (Note 10) (Figure 3)
OUTEN ↓ , VID0 to VID4 = 0 (Note 10) (Figure 3)
(Figure 4)
(Figure 4)
q
q
q
q
q
q
q
0.5
200
200
1.6
30
1
500
500
1.7
90
100
2
1000
1000
1.8
0.8
150
ms
μ s
μ s
V
V
ns
ns
V IH
V IL
R SENSE
VID0 to VID4 Input High Voltage
VID0 to VID4 Input Low Voltage
SENSE Input Resistance
q
q
2
108
0.8
V
V
k ?
R VID
VID0 to VID4 Internal Pull-Up
q
10
20
k ?
Resistance
V OL
I SINK
Digital Output Low Voltage
Digital Output Sink Current
I SINK = 1.6mA, Measured at PWRGD and FAULT
q
q
0.1
0.4
10
V
mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: When I FB is taken below GND, it will be clamped by an internal diode.
This pin can handle input currents greater than 100mA below GND without
latchup. In the positive direction, it is not clamped to V CC or PV CC .
Note 3: All currents into device pins are positive; all currents out of the
device pins are negative. All voltages are referenced to ground unless
otherwise specified.
Note 4: The Power Good and FAULT trip thresholds are tested at the 1.8V
output voltage code. The Power Good and FAULT trip thresholds are
guaranteed by design for all other output voltage codes to the same
specification.
Note 5: The LTC1753 goes into the shutdown mode if VID0 to VID4 are
floating. Due to the internal pull-up resistors, there will be an additional
the LTC1753 operating frequency, supply voltage and the external FETs
used.
Note 7: The open-loop DC gain and transconductance from the SENSE pin to
COMP pin will be (G ERR )(1.26/3.3) and (g mERR )(1.26/3.3) respectively.
Note 8: The current limiting amplifier can sink but cannot source current.
Under normal (not current limited) operation, the output current will be zero.
Note 9: Under typical soft current limit, the net soft-start discharge current
will be 60 μ A (I SSIL ) + [– 12 μ A(I SS )] ? 48 μ A. The soft-start sink-to-source
current ratio is designed to be 5:1.
Note 10: When VID0 to VID4 are all HIGH, the LTC1753 will be forced to
shut down internally. The OUTEN trip voltages are guaranteed by design for
all other input codes.
Note 11: This parameter is guaranteed by design and correlation and is not
tested in production.
0.25mA/pin if any of the VID0 to VID4 pins are pulled low.
Note 6 : Supply current in normal operation is dominated by the current
needed to charge and discharge the external FET gates. This will vary with
1753fa
3
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