参数资料
型号: LTC1876EG
厂商: Linear Technology
文件页数: 24/36页
文件大小: 0K
描述: IC REG CTRLR BST PWM CM 36-SSOP
标准包装: 37
系列: PolyPhase®
PWM 型: 电流模式
输出数: 3
频率 - 最大: 360kHz
占空比: 99.4%
电源电压: 3.5 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 36-SSOP(0.209",5.30mm 宽)
包装: 管件
LTC1876
APPLICATIO S I FOR ATIO
Voltage Positioning
Voltage positioning can be used to minimize peak-to-peak
output voltage excursions under worst-case transient
loading conditions. The open loop DC gain of the control
loop is reduced depending upon the maximum load step
specifications. Voltage positioning can be easily added to
the LTC1876 by loading the I TH pin with a resistive divider
having a Thevenin equivalent voltage source equal to the
midpoint operating voltage of the error amplifier, or 1.2V
(see Figure 8).
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error amplifier. The
maximum output voltage deviation can theoretically be
reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application. A
complete explanation is included in Design Solutions 10.
(See: www.linear-tech.com)
INTV CC
R T2
1. The V IN current has two components: the first is the DC
supply current given in the Electrical Characteristics table,
which excludes MOSFET driver and control currents; the
second is the current drawn from the 3.3V linear regulator
output. V IN current typically results in a small (<0.1%)
loss.
2. INTV CC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high to
low again, a packet of charge dQ moves from INTV CC to
ground. The resulting dQ/dt is a current out of INTV CC that
is typically much larger than the control circuit current. In
continuous mode, I GATECHG =f(Q T +Q B ), where Q T and Q B
are the gate charges of the topside and bottom side
MOSFETs.
Supplying INTV CC power through the EXTV CC switch input
from an output-derived source will scale the V IN current
required for the driver and control circuits by a factor of
(Duty Cycle)/(Efficiency). For example, in a 20V to 5V
R T1
R C
C C
I TH
LTC1876
application, 10mA of INTV CC current results in approxi-
mately 3mA of V IN current. This reduces the mid-current
loss from 10% or more (if the driver was powered directly
1876 F08
Figure 8. Active Voltage Positioning Applied to the LTC1876
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1876 circuits: 1) LTC1876 V IN current (in-
cluding loading on the 3.3V internal regulator), 2) INTV CC
regulator current, 3) I 2 R losses, 4) topside MOSFET
transition losses.
from V IN ) to only a few percent.
3. I 2 R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resistor,
and input and output capacitor ESR. In continuous mode
the average output current flows through L and R SENSE ,
but is “chopped” between the topside MOSFET and the
synchronous MOSFET. If the two MOSFETs have approxi-
mately the same R DS(ON) , then the resistance of one
MOSFET can simply be summed with the resistances of L,
R SENSE and ESR to obtain I 2 R losses. For example, if each
R DS(ON) = 30m ? , R L = 50m ? , R SENSE = 10m ? and R ESR
= 40m ? (sum of both input and output capacitance
losses), then the total resistance is 130m ? . This results in
losses ranging from 3% to 13% as the output current
increases from 1A to 5A for a 5V output, or a 4% to 20%
loss for a 3.3V output. Efficiency varies as the inverse
square of V OUT for the same external components and
output power level. The combined effects of increasingly
lower output voltages and higher currents required by
high performance digital systems is not doubling but
1876fa
24
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LTC1876EG#TR 功能描述:IC REG CTRLR BST PWM CM 36-SSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX
LTC1876EG#TRPBF 功能描述:IC REG CTRLR BST PWM CM 36-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX
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