参数资料
型号: LTC1909-8EG
厂商: Linear Technology
文件页数: 9/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-SSOP
标准包装: 47
PWM 型: 电流模式
输出数: 1
频率 - 最大: 200kHz
占空比: 90%
电源电压: 4 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 管件
其它名称: LTC19098EG
LTC1909-8
PI FU CTIO S
RUN/SS (Pin 1): Run Control and Soft-Start Input. A
capacitor to ground at this pin sets the ramp time to full
output current (approximately 3s/ μ F) and the time delay
for overcurrent latchoff (see Applications Information).
Forcing this pin below 0.8V shuts down the device.
V ON (Pin 2): On-Time Voltage Input. Voltage trip point for
the on-time comparator. Tying this pin to the output
voltage makes the on-time proportional to V OUT . The
comparator input defaults to 0.7V when the pin is grounded
and 2.4V when the pin is tied to INTV CC .
PGOOD (Pin 3): Power Good Output. Open-drain logic
output that is pulled to ground when the output voltage is
not within ± 7.5% of the regulation point.
V RNG (Pin 4): Sense Voltage Range Input. The voltage at
this pin is ten times the nominal sense voltage at maxi-
mum output current and can be set from 0.5V to 2V by a
resistive divider from INTV CC . The nominal sense voltage
defaults to 70mV when this pin is tied to ground, 140mV
when tied to INTV CC .
FCB (Pin 5): Forced Continuous Input. Tie this pin to
ground to force continuous synchronous operation at low
load, to INTV CC to enable discontinuous mode operation
at low load or to a resistive divider from a secondary output
when using a secondary winding.
I TH (Pin 6): Current Control Threshold and Error Amplifier
Compensation Point. The current comparator threshold
increases with this control voltage. The voltage ranges
from 0V to 2.4V with 0.8V corresponding to zero sense
voltage (zero current).
SGND (Pin 7): Signal Ground. All small-signal compo-
nents and compensation components should connect to
this ground, which in turn connects to PGND at one point.
I ON (Pin 8): On-Time Current Input. Tie a resistor from V IN
to this pin to set the one-shot timer current and thereby set
the switching frequency.
V FB (Pin 9): Error Amplifier Feedback Input. This pin
connects to the error amplifier input to the center tap of the
SMBus programmable divider at the FB pin (Pin 17).
SEL (Pin 10): Register Select Input. A TTL compatible
logic input pin that is used to select 1 of 2 resistor divider
settings. SEL selects the setting in Register 0 if pulled low
and the setting in Register 1 if pulled high.
SDA (Pin 11): SMBus Data Input/Output. SDA is a high
impedance input when address, command or data bits are
shifted into the SMBus interface. It is an open-drain
N-channel output when acknowledging or sending data
back to the microprocessor during read back. It requires
a pull-up resistor or current source to V CC .
SCL (Pin 12): SMBus Clock Input. Data at the SDA pin is
latched into the LTC1909-8 SMBus interface at the rising
edge of the clock and is shifted out of the SDA pin at the
falling edge of the clock. SCL is a high impedance input
pin. It is driven by the open collector output of a micropro-
cessor and requires a pull-up resistor or current source to
V CC .
VRON (Pin 13): Global Control Input. This TTL compatible
input pin is pulled up internally by a 2.5 μ A current source.
Pulling VRON low forces the open-drain output pins
(CPUON and PGTMR) to pull to ground. If the LTC1909-8
is programmed to turn on a DC/DC converter, pulling
VRON high three-states the CPUON pin and allows the
switching regulator to soft-start if CPUON is tied to the
RUN/SS pin.
PGTMR (Pin 14): Power Good Timer Output. This open-
drain output is pulled low for 50 μ s each time the switching
regulator is turned on or SEL is toggled to select a new
code. PGTMR may be connected to the FCB pin to force the
converter into continuous mode operation. This reduces
the time needed for the converter output to settle to a lower
output voltage under light load conditions if the SEL pin is
toggled to select a lower output voltage.
CPUON (Pin 15): CPU DC/DC Converter Control. Open-
drain output, usually connected to the RUN/SS pin. It pulls
low to shut down the converter or becomes high imped-
ance to allow the converter to soft-start.
V OSENSE (Pin 16): Sense Input. Upper terminal of the
SMBus programmable resistor divider that is connected
directly to the regulated output voltage node.
19098f
9
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