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| 型号： | LTC2486IDE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/36页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT W/PGA 14-DFN |
| 标准包装： | 91 |
| 位数： | 16 |
| 采样率（每秒）： | 15 |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 800µW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-WFDFN 裸露焊盘 |
| 供应商设备封装： | 14-DFN-EP（4x3） |
| 包装： | 管件 |
| 输入数目和类型： | 4 个单端，双极；2 个差分，双极 |
| 产品目录页面： | 1348 (CN2011-ZH PDF) |
| 配用： | DC1009A-C-ND - BOARD DELTA SIGMA ADC LTC2486 |
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LTC2486
15
2486fd
APPLICATIONS INFORMATION
SERIAL INTERFACE PINS
The LTC2486 transmits the conversion result, reads the
input conguration, and receives a start of conversion
command through a synchronous 3- or 4-wire interface.
During the conversion and sleep states, this interface can be
used to access the converter status. During the data output
state, it is used to read the conversion result, program the
input channel, rejection frequency, speed multiplier, select
the temperature sensor and set the gain.
Serial Clock Input/Output (SCK)
The serial clock pin (SCK) is used to synchronize the data
input/output transfer. Each bit is shifted out of the SDO
pin on the falling edge of SCK and data is shifted into the
SDI pin on the rising edge of SCK.
The serial clock pin (SCK) can be congured as either a
master (SCK is an output generated internally) or a slave
(SCK is an input and applied externally). Master mode
(Internal SCK) is selected by simply oating the SCK pin.
Slave mode (External SCK) is selected by driving SCK low
during power up and each falling edge of CS. Specic
details of these SCK modes are described in the Serial
Interface Timing Modes section.
Serial Data Output (SDO)
The serial data output pin (SDO) provides the result of the
last conversion as a serial bit stream (MSB rst) during
the data output state. In addition, the SDO pin is used as
an end of conversion indicator during the conversion and
sleep states.
When CS is HIGH, the SDO driver is switched to a high
impedance state in order to share the data output line with
other devices. If CS is brought LOW during the conversion
phase, the EOC bit (SDO pin) will be driven HIGH. Once
the conversion is complete, if CS is brought LOW, EOC will
be driven LOW indicating the conversion is complete and
the result is ready to be shifted out of the device.
Chip Select (CS)
The active low CS pin is used to test the conversion status,
enable I/O data transfer, initiate a new conversion, control
the duration of the sleep state, and set the SCK mode.
At the conclusion of a conversion cycle, while CS is HIGH,
the device remains in a low power sleep state where the
supply current is reduced several orders of magnitude. In
order to exit the sleep state and enter the data output state,
CS must be pulled low. Data is now shifted out the SDO pin
under control of the SCK pin as described previously.
A new conversion cycle is initiated either at the conclusion
of the data output cycle (all 24 data bits read) or by pulling
CS HIGH any time between the rst and 24th rising edges
of the serial clock (SCK). In this case, the data output is
aborted and a new conversion begins.
Serial Data Input (SDI)
The serial data input (SDI) is used to select the input
channel, rejection frequency, speed multiplier, gain, and to
access the integrated temperature sensor. Data is shifted
into the device during the data output/input state on the
rising edge of SCK while CS is low.
OUTPUT DATA FORMAT
The LTC2486 serial output stream is 24 bits long. The
rst bit indicates the conversion status, the second bit is
always zero, and the third bit conveys sign information.
The next 17 bits are the conversion result, MSB rst. The
remaining 4 bits are always LOW.
Bit 23 (rst output bit) is the end of conversion (EOC)
indicator. This bit is available on the SDO pin during the
conversion and sleep states whenever CS is LOW. This
bit is HIGH during the conversion cycle, goes LOW once
the conversion is complete, and is HIGH-Z when CS is
HIGH.
Bit 22 (second output bit) is a dummy bit (DMY) and is
always LOW.
Bit 21 (third output bit) is the conversion result sign
indicator (SIG). If the selected input (VIN = IN+ – IN–) is
greater than or equal to 0V, this bit is HIGH. If VIN < 0,
this bit is LOW.
Bit 20 (fourth output bit) is the most signicant bit (MSB)
of the result. This bit in conjunction with Bit 21 also pro-
vides underrange and overrange indication. If both Bit 21
and Bit 20 are HIGH, the differential input voltage is above
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