参数资料
| 型号： | LTC3417EDHC#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ DL 16DFN |
| 标准包装： | 73 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.25 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 1.5MHz，600kHz ~ 4MHz |
| 电流 - 输出： | 800mA，1.4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFDFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 16-DFN（5x3） |
LTC3417
APPLICATIONS INFORMATION
V OUT ( V IN – V OUT )
I RMS = ( I 1 +I 2 )
I L ESR COUT +
V OUT
I 1 = I LIM1 –
I 2 = I LIM2 –
When D1 = D2 then the equation simpli?es to:
I RMS = ( I 1 + I 2 ) D ( 1– D )
or
V IN
where the maximum average output currents I 1 and I 2
equal the respective peak currents minus half the peak-
to-peak ripple currents:
I L1
2
I L2
2
These formula have a maximum at V IN = 2V OUT , where
I RMS = (I 1 + I 2 )/2. This simple worst case is commonly
used to determine the highest I RMS .
For “out of phase” operation, the ripple current can be
lower than the “in phase” current.
In the “out of phase” case, the maximum I RMS does not
occur when V OUT1 = V OUT2 . The maximum typically oc-
curs when V OUT1 – V IN /2 = V OUT2 or when V OUT2 – V IN /2
= V OUT1 . As a good rule of thumb, the amount of worst
case ripple is about 75% of the worst case ripple in the
“in phase” mode. Also note that when V OUT1 = V OUT2 =
V IN /2 and I 1 = I 2 , the ripple is zero.
Note that capacitor manufacturer’s ripple current ratings
are often based on only 2000 hours lifetime. This makes
it advisable to further derate the capacitor, or choose a
capacitor rated at a higher temperature than required.
Several capacitors may also be paralleled to meet the
size or height requirements of the design. An additional
0.1μF to 1μF ceramic capacitor is also recommended on
V IN for high frequency decoupling, when not using an all
ceramic capacitor solution.
Output Capacitor (C OUT1 and C OUT2 ) Selection
The selection of C OUT1 and C OUT2 is driven by the required
ESR to minimize voltage ripple and load step transients.
Typically, once the ESR requirement is satis?ed, the
capacitance is adequate for ?ltering. The output ripple
( Δ V OUT ) is determined by:
1
8 ? f O ? C OUT
where f O = operating frequency, C OUT = output capacitance
and Δ I L = ripple current in the inductor. The output ripple
is highest at maximum input voltage, since Δ I L increases
with input voltage. With Δ I L = 0.35I LOAD(MAX) , the output
ripple will be less than 100mV at maximum V IN and f O =
1MHz with:
ESR COUT < 150mΩ
Once the ESR requirements for C OUT have been met, the
RMS current rating generally far exceeds the I RIPPLE(P-P)
requirement, except for an all ceramic solution.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirement of the application. Aluminum
electrolytic, special polymer, ceramic and dry tantalum
capacitors are all available in surface mount packages.
The OS-CON semiconductor dielectric capacitor avail-
able from Sanyo has the lowest ESR(size) product of any
aluminum electrolytic at a somewhat higher price. Special
polymer capacitors, such as Sanyo POSCAP, offer very
low ESR, but have a lower capacitance density than other
types. Tantalum capacitors have the highest capacitance
density, but it has a larger ESR and it is critical that the
capacitors are surge tested for use in switching power
supplies. An excellent choice is the AVX TPS series of
surface tantalums, available in case heights ranging from
2mm to 4mm. Aluminum electrolytic capacitors have a
signi?cantly larger ESR, and are often used in extremely
cost-sensitive applications provided that consideration
3417fd
11
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