参数资料
型号: LTC3417EDHC#PBF
厂商: Linear Technology
文件页数: 6/20页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ DL 16DFN
标准包装: 73
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.8 V ~ 5 V
输入电压: 2.25 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 1.5MHz,600kHz ~ 4MHz
电流 - 输出: 800mA,1.4A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WFDFN 裸露焊盘
包装: 管件
供应商设备封装: 16-DFN(5x3)
LTC3417
PIN FUNCTIONS
(DFN/TSOP)
RUN1 (Pin 1/Pin 2): Enable for 1.4A Regulator. When
at Logic 1, 1.4A regulator is running. When at 0V, 1.4A
regulator is off. When both RUN1 and RUN2 are at 0V, the
part is in shutdown.
V IN1 (Pin 2/Pin 3): Supply Pin for P-channel Switch of
1.4A Regulator.
I TH1 (Pin 3/Pin 4): Error Ampli?er Compensation Point
for 1.4A Regulator. The current comparator threshold
increases with this control voltage. Nominal voltage range
for this pin is 0V to 1.5V.
V FB1 (Pin 4/Pin 5): Receives the feedback voltage from
external resistive divider across the 1.4A regulator output.
Nominal voltage for this pin is 0.8V.
V FB2 (Pin 5/Pin 6): Receives the feedback voltage from
external resistive divider across the 800mA regulator
output. Nominal voltage for this pin is 0.8V.
I TH2 (Pin 6/Pin 7): Error Ampli?er Compensation Point
for 800mA regulator. The current comparator threshold
increases with this control voltage. Nominal voltage range
for this pin is 0V to 1.5V.
RUN2 (Pin 7/Pin 8): Enable for 800mA Regulator. When at
Logic 1, 800mA regulator is running. When at 0V, 800mA
regulator is off. When both RUN1 and RUN2 are at 0V, the
part is in shutdown.
V IN2 (Pin 8/Pin 9): Supply Pin for P-channel Switch of
800mA Regulator and Supply for Analog Circuitry.
MODE (Pin 9/Pin 12): Mode Selection Pin. This pin
controls the operation of the device. When the voltage
on the MODE pin is >(V IN – 0.5V), Burst Mode operation
is selected. When the voltage on the MODE pin is <0.5V,
pulse skipping mode is selected. When the MODE pin is
SW2 (Pin 10/Pin 13): Switch Node Connection to the
Inductor for the 800mA Regulator. This pin swings from
V IN2 to PGND2.
PGOOD (Pin 11/Pin 14): Power Good Pin. This common
drain-logic output is pulled to GND when the output voltage
of either regulator is – 6% of regulation. If either RUN1 or
RUN2 is low (the respective regulator is in sleep mode and
therefore the output voltage is low), then PGOOD re?ects
the regulation of the running regulator.
FREQ (Pin 12/Pin 15): Frequency Set Pin. When FREQ is
at V IN , internal oscillator runs at 1.5MHz. When a resistor
is connected from this pin to ground, the internal oscillator
frequency can be varied from 0.6MHz to 4MHz.
GNDA (Pin 13/Pin 16): Analog Ground Pin for Internal
Analog Circuitry.
PHASE (Pin 14/Pin 17): Selects 800mA regulator switching
phase with respect to 1.4A regulator switching. Set to V IN ,
the 1.4A regulator and the 800mA regulator are in phase.
When PHASE is at 0V, the 1.4A regulator and the 800mA
regulator are switching 180 degrees out-of-phase.
SW1 (Pin 15/Pin 18): Switch Node Connection to the
Inductor for the 1.4A Regulator. This pin swings from
V IN1 to PGND1.
PGND1 (Pin 16/Pin 19): Ground for SW1 N-channel
Driver.
PGND2, GNDD (Pins 1,10,11,20): TSSOP Package Only.
Ground for SW2 N-channel driver and digital ground for
circuit.
Exposed Pad (Pin 17/Pin 21): PGND2, GNDD. Ground for
SW2 N-channel driver and digital ground for circuit. The
Exposed Pad must be soldered to PCB ground.
held at V IN /2, forced continuous mode is selected.
3417fd
6
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