参数资料
| 型号： | LTC3417EDHC#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 14/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ DL 16DFN |
| 标准包装： | 73 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.25 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 1.5MHz，600kHz ~ 4MHz |
| 电流 - 输出： | 800mA，1.4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFDFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 16-DFN（5x3） |
LTC3417
APPLICATIONS INFORMATION
Switching regulators take several cycles to respond to a
step in load current. When a load step occurs, V OUT im-
mediately shifts by an amount equal to Δ I LOAD ? ESR COUT ,
where ESR COUT is the effective series resistance of C OUT .
Δ I LOAD also begins to charge or discharge C OUT generat-
ing a feedback error signal used by the regulator to return
V OUT to its steady-state value. During this recovery time,
V OUT can be monitored for overshoot or ringing that would
indicate a stability problem.
The initial output voltage step may not be within the band-
width of the feedback loop, so the standard second order
overshoot/DC ratio cannot be used to determine phase
margin. The gain of the loop increases with R ITH and the
bandwidth of the loop increases with decreasing C ITH . If
R ITH is increased by the same factor that C ITH is decreased,
the zero frequency will be kept the same, thereby keeping
the phase the same in the most critical frequency range
of the feedback loop. In addition, feedforward capacitors,
C1 and C2, can be added to improve the high frequency
response, as shown in Figure 4. Capacitor C1 provides
phase lead by creating a high frequency zero with R1
which improves the phase margin for the 1.4A SW1 chan-
nel. Capacitor C2 provides phase lead by creating a high
frequency zero with R3 which improves the phase margin
for the 800mA SW2 channel.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to Linear Technology
Application Note 76.
Although a buck regulator is capable of providing the full
output current in dropout, it should be noted that as the
input voltage V IN drops toward V OUT , the load step capability
does decrease due to the decreasing voltage across the
inductor. Applications that require large load step capabil-
ity near dropout should use a different topology such as
SEPIC, Zeta, or single inductor, positive buck boost.
In some applications, a more severe transient can be
caused by switching in loads with large (>1μF) input ca-
pacitors. The discharged input capacitors are effectively
put in parallel with C OUT , causing a rapid drop in V OUT . No
regulator can deliver enough current to prevent this prob-
lem, if the switch connecting the load has low resistance
and is driven quickly. The solution is to limit the turn-on
speed of the load switch driver. A Hot Swap? controller
is designed speci?cally for this purpose and usually in-
corporates current limiting, short-circuit protection, and
soft- starting.
Ef?ciency Considerations
The percent ef?ciency of a switching regulator is equal to
the output power divided by the input power times 100.
It is often useful to analyze individual losses to determine
what is limiting the ef?ciency and which change would
produce the most improvement. Percent ef?ciency can
be expressed as:
% Ef?ciency = 100% – (P1+ P2 + P3 +…)
where P1, P2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources account for most of the losses
in LTC3417 circuits: 1) LTC3417 I S current, 2) switching
losses, 3) I 2 R losses, 4) other losses.
1) The I S current is the DC supply current given in the elec-
trical characteristics which excludes MOSFET driver and
control currents. I S current results in a small (< 0.1%)
loss that increases with V IN , even at no load.
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge moves from
V IN to ground. The resulting charge over the switching
period is a current out of V IN that is typically much larger
than the DC bias current. The gate charge losses are
proportional to V IN and thus their effects will be more
pronounced at higher supply voltages.
HotSwap is a trademark of Linear Technology Corporation..
3417fd
14
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