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参数资料
| 型号： | LTC3548IMSE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ DL 10MSOP |
| 标准包装： | 50 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.6 V ~ 5 V |
| 输入电压： | 2.5 V ~ 5.5 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 2.25MHz |
| 电流 - 输出： | 400mA，800mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 10-MSOP 裸露焊盘 |
LTC3548
APPLICATIONS INFORMATION
the losses in LTC3548 circuits: 1) V IN quiescent current,
2) switching losses, 3) I 2 R losses, 4) other losses.
1. The V IN current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET
driver and control currents. V IN current results in a
small (<0.1%) loss that increases with V IN , even at
no load.
2. The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from V IN to ground. The resulting dQ/dt is a current
out of V IN that is typically much larger than the DC bias
current. In continuous mode, I GATECHG = f O (Q T + Q B ),
where Q T and Q B are the gate charges of the internal
top and bottom MOSFET switches. The gate charge
losses are proportional to V IN and thus their effects will
be more pronounced at higher supply voltages.
3. I 2 R losses are calculated from the DC resistances of
the internal switches, R SW , and external inductor,
R L . In continuous mode, the average output current
?ows through inductor L, but is “chopped” between
the internal top and bottom switches. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R DS(ON) and the duty cycle
(D) as follows:
R SW = (R DS(ON)TOP )(D) + (R DS(ON)BOT )(1 – D)
The R DS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Character-
istics curves. Thus, to obtain I 2 R losses:
I 2 R losses = (I OUT ) 2 (R SW + R L )
4. Other hidden losses such as copper trace and inter-
nal battery resistances can account for additional ef-
?ciency degradations in portable systems. It is very
important to include these system level losses in the
design of a system. The internal battery and fuse re-
sistance losses can be minimized by making sure that
C IN has adequate charge storage and very low ESR at
the switching frequency. Other losses including diode
conduction losses during dead-time and inductor
core losses generally account for less than 2% total
additional loss.
Thermal Considerations
In a majority of applications, the LTC3548 does not dis-
sipate much heat due to its high ef?ciency. However, in
applications where the LTC3548 is running at high ambient
temperature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150°C, both power
switches will turn off and the SW node will become high
impedance.
To prevent the LTC3548 from exceeding the maximum
junction temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
T RISE = P D ? θ JA
where P D is the power dissipated by the regulator and θ JA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature, T J , is given by:
T J = T RISE + T AMBIENT
As an example, consider the case when the LTC3548 is
in dropout on both channels at an input voltage of 2.7V
with a load current of 400mA and 800mA and an ambi-
ent temperature of 70°C. From the Typical Performance
Characteristics graph of Switch Resistance, the R DS(ON)
resistance of the main switch is 0.425Ω. Therefore, power
dissipated by each channel is:
P D = (I OUT ) 2 ? R DS(ON) = 272mW and 68mW
The MS package junction-to-ambient thermal resistance,
θ JA , is 45°C/W. Therefore, the junction temperature of
the regulator operating in a 70°C ambient temperature is
approximately:
T J = (0.272 + 0.068) ? 45 + 70 = 85.3°C
which is below the absolute maximum junction tempera-
ture of 125°C.
3548fc
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| LTC3549EDCB#TRM | 制造商:Linear Technology 功能描述:250MA, LOW VIN BUCK REGULATOR |
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