参数资料
型号: LTC3548IMSE#PBF
厂商: Linear Technology
文件页数: 7/16页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ DL 10MSOP
标准包装: 50
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.6 V ~ 5 V
输入电压: 2.5 V ~ 5.5 V
PWM 型: 电流模式,混合
频率 - 开关: 2.25MHz
电流 - 输出: 400mA,800mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)裸露焊盘
包装: 管件
供应商设备封装: 10-MSOP 裸露焊盘
LTC3548
OPERATION
This decrease causes the error ampli?er to increase the
I TH voltage until the average inductor current matches the
new load current.
The main control loop is shut down by pulling the RUN
pin to ground.
Low Current Operation
By selecting MODE/SYNC (Pin 6), two modes are available
to control the operation of the LTC3548 at low currents. Both
modes automatically switch from continuous operation to
the selected mode when the load current is low.
To optimize ef?ciency, the Burst Mode operation can be
selected. When the load is relatively light, the LTC3548
automatically switches into Burst Mode operation, in which
the PMOS switch operates intermittently based on load
demand with a ?xed peak inductor current. By running
cycles periodically, the switching losses which are domi-
nated by the gate charge losses of the power MOSFETs
are minimized. The main control loop is interrupted when
the output voltage reaches the desired regulated value. A
voltage comparator trips when I TH is below 0.35V, shutting
off the switch and reducing the power. The output capaci-
tor and the inductor supply the power to the load until I TH
exceeds 0.65V, turning on the switch and the main control
loop which starts another cycle.
For lower ripple noise at low currents, the pulse-skipping
mode can be used. In this mode, the LTC3548 continues to
switch at a constant frequency down to very low currents,
where it will begin skipping pulses. The ef?ciency in pulse-
skipping mode can be improved slightly by connecting
the SW node to the MODE/SYNC input which reduces the
clock frequency by approximately 30%.
Dropout Operation
When the input supply voltage decreases toward the
output voltage, the duty cycle increases to 100% which
is the dropout condition. In dropout, the PMOS switch is
turned on continuously with the output voltage being equal
to the input voltage minus the voltage drops across the
internal P-channel MOSFET and the inductor.
An important design consideration is that the R DS(ON)
of the P-channel switch increases with decreasing input
supply voltage (see Typical Performance Characteristics).
Therefore, the user should calculate the power dissipation
when the LTC3548 is used at 100% duty cycle with low
input voltage (see Thermal Considerations in the Applica-
tions Information section).
Low Supply Operation
To prevent unstable operation, the LTC3548 incorporates
an undervoltage lockout circuit which shuts down the part
when the input voltage drops below about 1.65V.
APPLICATIONS INFORMATION
A general LTC3548 application circuit is shown in
Figure 2. External component selection is driven by the
load requirement, and begins with the selection of the
inductor L. Once the inductor is chosen, C IN and C OUT
can be selected.
Inductor Selection
Although the inductor does not in?uence the operating
frequency, the inductor value has a direct effect on ripple
current. The inductor ripple current ΔI L decreases with
Accepting larger values of ΔI L allows the use of low
inductances, but results in higher output voltage ripple,
greater core losses, and lower output current capability.
A reasonable starting point for setting ripple current is
ΔI L = 0.3 ? I OUT(MAX) , where I OUT(MAX) is 800mA for channel
1 and 400mA for channel 2. The largest ripple current
ΔI L occurs at the maximum input voltage. To guarantee
that the ripple current stays below a speci?ed maximum,
the inductor value should be chosen according to the
following equation:
Δ I L = OUT
? ? 1– OUT ?
V OUT ?
higher inductance and increases with higher V IN or V OUT :
V ? V ?
f O ? L ? V IN ?
L ≥
V OUT
f O ? Δ I L
?
? ? 1–
?
?
V IN(MAX) ?
3548fc
7
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