参数资料
型号: LTC3707IGN#TRPBF
厂商: Linear Technology
文件页数: 16/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-SSOP
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 360kHz
占空比: 99.4%
电源电压: 4.5 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
LTC3707
APPLICATIONS INFORMATION
30% to 70% when compared to a single phase power
supply solution.
The type of input capacitor, value and ESR rating have
ef?ciency effects that need to be considered in the selec-
tion process. The capacitance value chosen should be
suf?cient to store adequate charge to keep high peak
battery currents down. 20μF to 40μF is usually suf?cient
for a 25W output supply operating at 200kHz. The ESR of
the capacitor is important for capacitor power dissipation
as well as overall battery ef?ciency. All of the power (RMS
ripple current ? ESR) not only heats up the capacitor but
wastes power from the battery.
Medium voltage (20V to 35V) ceramic, tantalum, OS-CON
and switcher-rated electrolytic capacitors can be used
as input capacitors, but each has drawbacks: ceramic
voltage coef?cients are very high and may have audible
piezoelectric effects; tantalums need to be surge-rated;
OS-CONs suffer from higher inductance, larger case size
and limited surface-mount applicability; electrolytics’
higher ESR and dryout possibility require several to be
used. Multiphase systems allow the lowest amount of
capacitance overall. As little as one 22μF or two to three
10μF ceramic capacitors are an ideal choice in a 20W to
50W power supply due to their extremely low ESR. Even
though the capacitance at 20V is substantially below their
rating at zero-bias, very low ESR loss makes ceramics
an ideal candidate for highest ef?ciency battery operated
systems. Also consider parallel ceramic and high quality
electrolytic capacitors as an effective means of achieving
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capaci-
tor, or to choose a capacitor rated at a higher temperature
than required. Several capacitors may also be paralleled
to meet size or height requirements in the design. Always
consult the manufacturer if there is any question.
The bene?t of the LTC3707 multiphase can be calculated by
using the equation above for the higher power controller
and then calculating the loss that would have resulted if
both controller channels switch on at the same time. The
total RMS power lost is lower when both controllers are
operating due to the interleaving of current pulses through
the input capacitor’s ESR. This is why the input capacitor’s
requirement calculated above for the worst-case controller
is adequate for the dual controller design. Remember that
input protection fuse resistance, battery resistance and PC
board trace resistance losses are also reduced due to the
reduced peak currents in a multiphase system. The overall
bene?t of a multiphase design will only be fully realized
when the source impedance of the power supply/battery
is included in the ef?ciency testing. The drains of the
two top MOSFETS should be placed within 1cm of each
other and share a common C IN (s). Separating the drains
and C IN may produce undesirable voltage and current
resonances at V IN .
The selection of C OUT is driven by the required effective
series resistance (ESR). Typically once the ESR require-
ment is satis?ed the capacitance is adequate for ?ltering.
The output ripple (Δ V OUT ) is determined by:
Δ V OUT ≈ Δ I L ? ESR +
ESR and bulk capacitance goals.
In continuous mode, the source current of the top N-channel
MOSFET is a square wave of duty cycle V OUT /V IN . To prevent
?
?
1 ?
8fC OUT ? ?
?? V OUT ( V IN ? V OUT ) ??
largevoltagetransients,alowESRinputcapacitorsizedfor
the maximum RMS current of one channel must be used.
The maximum RMS capacitor current is given by:
1/2
C IN RequiredI RMS ≈ I MAX
V IN
This formula has a maximum at V IN = 2V OUT , where
I RMS = I OUT /2. This simple worst case condition is com-
monly used for design because even signi?cant deviations
do not offer much relief. Note that capacitor manufacturer’s
Where f = operating frequency, C OUT = output capacitance,
and Δ I L = ripple current in the inductor. The output ripple is
highest at maximum input voltage since Δ I L increases with
input voltage. With Δ I L = 0.3I OUT(MAX) the output ripple will
typically be less than 50mV at max V IN assuming:
C OUT Recommended ESR < 2 R SENSE
and C OUT > 1/(8fR SENSE )
The ?rst condition relates to the ripple current into the ESR
of the output capacitance while the second term guarantees
3707fb
16
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