参数资料
型号: LTC3707IGN#TRPBF
厂商: Linear Technology
文件页数: 23/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-SSOP
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 360kHz
占空比: 99.4%
电源电压: 4.5 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
LTC3707
APPLICATIONS INFORMATION
Ef?ciency Considerations
The percent ef?ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the ef?ciency and which change would
produce the most improvement. Percent ef?ciency can
be expressed as:
%Ef?ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most
of the losses in LTC3707 circuits: 1) LTC3707 V IN cur-
rent (including loading on the 3.3V internal regulator),
2) INTV CC regulator current, 3) I 2 R losses, 4) Topside
MOSFET transition losses.
1. The V IN current has two components: the ?rst is the DC
supply current given in the Electrical Characteristics table,
which excludes MOSFET driver and control currents; the
second is the current drawn from the 3.3V linear regulator
output. V IN current typically results in a small (<0.1%)
loss.
2. INTV CC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from INTV CC
to ground. The resulting dQ/dt is a current out of INTV CC
that is typically much larger than the control circuit cur-
rent. In continuous mode, I GATECHG =f(Q T +Q B ), where Q T
and Q B are the gate charges of the topside and bottom
side MOSFETs.
Supplying INTV CC power through the EXTV CC switch input
from an output-derived source will scale the V IN current
required for the driver and control circuits by a factor of
(Duty Cycle)/(Ef?ciency). For example, in a 20V to 5V ap-
plication, 10mA of INTV CC current results in approximately
2.5mA of V IN current. This reduces the mid-current loss
from 10% or more (if the driver was powered directly from
V IN ) to only a few percent.
3. I 2 R losses are predicted from the DC resistances of
the fuse (if used), MOSFET, inductor, current sense resis-
tor, and input and output capacitor ESR. In continuous
mode the average output current ?ows through L and
R SENSE , but is “chopped” between the topside MOSFET
and the synchronous MOSFET. If the two MOSFETs have
approximately the same R DS(ON) , then the resistance of
one MOSFET can simply be summed with the resistances
of L, R SENSE and ESR to obtain I 2 R losses. For example, if
each R DS(ON) = 30m Ω , R L = 50m Ω , R SENSE = 10m Ω and
R ESR = 40m Ω (sum of both input and output capacitance
losses), then the total resistance is 130m Ω . This results
in losses ranging from 3% to 13% as the output current
increases from 1A to 5A for a 5V output, or a 4% to 20%
loss for a 3.3V output. Ef?ciency varies as the inverse
square of V OUT for the same external components and
output power level. The combined effects of increasingly
lower output voltages and higher currents required by
high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switching
regulator system!
4. Transition losses apply only to the topside MOSFET(s),
and become signi?cant only when operating at high input
voltages (typically 15V or greater). Transition losses can
be estimated from:
Transition Loss = (1.7) V IN2 I O(MAX) C RSS f
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% ef?ciency degradation in portable systems. It is
very important to include these “system” level losses
during the design phase. The internal battery and fuse
resistance losses can be minimized by making sure that
C IN has adequate charge storage and very low ESR at the
switching frequency. A 25W supply will typically require
a minimum of 20μF to 40μF of capacitance having a
maximum of 20m Ω to 50m Ω of ESR. The LTC3707 2-
phase architecture typically halves this input capacitance
requirement over competing solutions. Other losses
including Schottky conduction losses during dead-time
and inductor core losses generally account for less than
2% total additional loss.
3707fb
23
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