参数资料
型号: LTC3708EUH#TRPBF
厂商: Linear Technology
文件页数: 8/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 32-QFN
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
占空比: 90%
电源电压: 4 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3708
PIN FUNCTIONS
RUN/SS (Pin 1): Run Control and Soft-Start Input. A
capacitor to ground at this pin sets the ramp rate of the
output voltage (approximately 0.5s/μF) and the time delay
for overcurrent latchoff (see Applications Information).
Forcing this pin below 0.8V shuts down the LTC3708.
I TH1 , I TH2 (Pins 2, 8): Error Ampli?er Compensation Point
and Current Control Threshold. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.8V corresponding to zero
sense voltage (zero current).
V FB1 , V FB2 (Pins 3, 7): Error Ampli?er Feedback Input.
This pin connects the error ampli?er input to an external
resistive divider from V OUT . Additional compensation can
be implemented, if desired, using this pin.
TRACK1, TRACK2 (Pins 4, 6): Tie TRACK2 pin to a re-
sistive divider connected to the output of channel 1 for
either coincident or ratiometric output tracking. TRACK1
is used in the same manner between multiple LTC3708s
(see Applications Information). To disable this feature, tie
the pins to V CC . Do Not Float These Pins.
SGND (Pins 5, 33): Signal Ground. All small-signal com-
ponents and compensation components should connect to
this ground and eventually connect to PGND at one point.
The Exposed Pad of the LTC3708EUH must be soldered
to the PCB.
EXTLPF (Pin 9): Filter Connection for the External PLL. This
PLL is used to synchronize the LTC3708 to an external clock.
If external clock is not used, leave this pin ?oating.
INTLPF (Pin 10): Filter Connection for the Internal PLL.
This PLL is used to phase shift the second channel to the
?rst channel by 180°.
V CC (Pin 17): Main Input Supply. Decouple this pin to
SGND with an RC ?lter (10Ω, 1μF for example).
DRV CC (Pin 21): Driver Supply. Provides supply to the
drivers for the bottom gates. Also used for charging the
bootstrap capacitors.
BG1, BG2 (Pins 22, 20): Bottom Gate Drive. Drives the
gate of the bottom N-channel MOSFET between ground
and DRV CC .
PGND1, PGND2 (Pins 23, 19): Power Ground. Connect this
pin closely to the source of the bottom N-channel MOSFET,
the (–) terminal of C DRVCC and the (–) terminal of C IN .
SENSE1–, SENSE2– (Pins 24, 18): Current Sense Com-
parator Input. The (–) input to the current comparator is
used to accurately Kelvin sense the bottom side of the
sense resistor or MOSFET.
SENSE1 + , SENSE2 + (Pins 25, 16): Current Sense Com-
parator Input. The (+) input to the current comparator is
normally connected to the SW node unless using a sense
resistor (See Applications Information).
SW1, SW2 (Pins 26, 15): Switch Node. The (–) terminal of the
bootstrap capacitor C B connects here. This pin swings from
a Schottky diode voltage drop below ground up to V IN .
TG1, TG2 (Pins 27, 14): Top Gate Drive. Drives the top
N-channel MOSFET with a voltage swing equal to DRV CC
superimposed on the switch node voltage SW.
BOOST1, BOOST2 (Pins 28, 13): Boosted Floating Driver
Supply. The (+) terminal of the bootstrap capacitor C B
connects here. This pin swings from a diode voltage drop
below DRV CC up to V IN + DRV CC .
I ON1 , I ON2 (Pins 29, 12): On-Time Current Input. Tie a
resistor from V IN to this pin to set the one-shot timer
current and thereby set the switching frequency.
PGOOD (Pin 30): Power Good Output. Open-drain logic
output that is pulled to ground when either or both output
voltages are not within ±10% of the regulation point. The
output voltage must be out of regulation for at least 100μs
before the power good output is pulled to ground.
FCB (Pin 31): Forced Continuous and External Clock Input.
Tie this pin to ground to force continuous synchronous
operation or to V CC to enable discontinuous mode opera-
tion at light load. Feeding an external clock signal into this
pin will synchronize the LTC3708 to the external clock and
enable forced continuous mode.
V RNG1 , V RNG2 (Pins 32, 11): Sense Voltage Range Input.
The voltage at this pin is ten times the nominal sense volt-
age at maximum output current and can be programmed
from 0.5V to 2V. The sense voltage defaults to 70mV when
this pin is tied to ground, 140mV when tied to V CC .
3708fb
8
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