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| 型号： | LTC3717EUH-1#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/20页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR STEP-DOWN SYNC 32QFN |
| 标准包装： | 73 |
| 应用： | 控制器，DDR，QDR |
| 输入电压： | 4 V ~ 36 V |
| 输出数： | 1 |
| 输出电压： | 2 V ~ 18 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 管件 |
| 产品目录页面： | 1335 (CN2011-ZH PDF) |
LTC3717-1
APPLICATIO S I FOR ATIO
based on only 2000 hours of life which makes it advisable
to derate the capacitor.
The selection of C OUT is primarily determined by the ESR
required to minimize voltage ripple and load step
transients. The output ripple ? V OUT is approximately
bounded by:
on, the switch node rises to V IN and the BOOST pin rises
to approximately V IN + INTV CC . The boost capacitor needs
to store about 100 times the gate charge required by the
top MOSFET. In most applications a 0.1 μ F to 0.47 μ F X5R
or X7R dielectric capacitor is adequate.
Fault Condition: Current Limit
? V OUT L ? ESR +
8 fC OUT ?
≤ ? I
?
?
1 ?
?
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage. In
Since ? I L increases with input voltage, the output ripple is
highest at maximum input voltage. Typically, once the ESR
requirement is satisfied, the capacitance is adequate for
filtering and has the necessary RMS current rating.
the LTC3717-1, the maximum sense voltage is controlled
by the voltage on the V RNG pin. With valley current control,
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
+ ? I L
? ? I L
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
I LIMITPOSITIVE =
I LIMITNEGATIVE =
V SNS ( MAX )
R DS ( ON ) ρ T
V SNS ( MIN )
R DS ( ON ) ρ T
1
2
1
2
Tantalum capacitors have the highest capacitance density
but it is important to only use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR, but
can be used in cost-sensitive applications providing that
consideration is given to ripple current ratings and long
term reliability. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coeffi-
cient and audible piezoelectric effects. The high Q of
ceramic capacitors with trace inductance can also lead to
significant ringing. When used as input capacitors, care
must be taken to ensure that ringing from inrush currents
and switching does not pose an overvoltage hazard to the
power switches and controller. To dampen input voltage
transients, add a small 5 μ F to 50 μ F aluminum electrolytic
capacitor with an ESR in the range of 0.5 ? to 2 ? . High
performance through-hole capacitors may also be used,
but an additional ceramic capacitor in parallel is recom-
mended to reduce the effect of their lead inductance.
Top MOSFET Driver Supply (C B , D B )
An external bootstrap capacitor C B connected to the BOOST
pin supplies the gate drive voltage for the topside MOSFET.
This capacitor is charged through diode D B from INTV CC
when the switch node is low. When the top MOSFET turns
12
The current limit value should be checked to ensure that
I LIMIT(MIN) > I OUT(MAX) . The minimum value of current limit
generally occurs with the largest V IN at the highest ambi-
ent temperature, conditions that cause the largest power
loss in the converter. Note that it is important to check for
self-consistency between the assumed MOSFET junction
temperature and the resulting value of I LIMIT which heats
the MOSFET switches.
Caution should be used when setting the current limit
based upon the R DS(ON) of the MOSFETs. The maximum
current limit is determined by the minimum MOSFET on-
resistance. Data sheets typically specify nominal and
maximum values for R DS(ON) , but not a minimum. A
reasonable assumption is that the minimum R DS(ON) lies
the same amount below the typical value as the maximum
lies above it. Consult the MOSFET manufacturer for further
guidelines.
Minimum Off-time and Dropout Operation
The minimum off-time t OFF(MIN) is the smallest amount of
time that the LTC3717-1 is capable of turning on the
bottom MOSFET, tripping the current comparator and
turning the MOSFET back off. This time is generally about
sn37171 37171fs
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