参数资料
型号: LTC3717EUH-1#PBF
厂商: Linear Technology
文件页数: 13/20页
文件大小: 0K
描述: IC CTRLR STEP-DOWN SYNC 32QFN
标准包装: 73
应用: 控制器,DDR,QDR
输入电压: 4 V ~ 36 V
输出数: 1
输出电压: 2 V ~ 18 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-QFN 裸露焊盘(5x5)
包装: 管件
产品目录页面: 1335 (CN2011-ZH PDF)
LTC3717-1
APPLICATIO S I FOR ATIO
250ns. The minimum off-time limit imposes a maximum
BOOST
DRV CC
duty cycle of t ON /(t ON + t OFF(MIN) ). If the maximum duty
cycle is reached, due to a dropping input voltage for
example, then the output will drop out of regulation. The
TG
10 ?
Q1
FMMT619
GATE
OF M1
BG
10 ?
Q3
FMMT619
GATE
OF M2
minimum input voltage to avoid dropout is:
Q2
FMMT720
Q4
FMMT720
V IN ( MIN ) = V OUT
t ON + t OFF (MIN)
t ON
SW PGND
Figure 5. Optional External Gate Driver
37171 F05
Output Voltage Programming
V OUT = V REF ?
?
?
?
When V FB is connected to V OUT , the output voltage is
regulated to one half of the voltage at the V REF pin. A
resistor connected between V FB and V OUT can be used to
further adjust the output voltage according to the follow-
ing equation:
? 60 k + R FB ?
120 k
Soft-Start and Latchoff with the RUN/SS Pin
The RUN/SS pin provides a means to shut down the
LTC3717-1 as well as a timer for soft-start and overcur-
rent latchoff. Pulling the RUN/SS pin below 0.8V puts the
LTC3717-1 into a low quiescent current shutdown
(I Q < 30 μ A). Releasing the pin allows an internal 1.2 μ A
current source to charge up the external timing capacitor
C SS . If RUN/SS has been pulled all the way to ground,
there is a delay before starting of about:
If V REF exceeds 3V, resistors should be placed in series
with the V REF pin and the V FB pin to avoid exceeding the
input common mode range of the internal error amplifier.
t DELAY =
1 . 5 V
1 . 2 μ A
C SS = ( 1 . 3 s / μ F ) C SS
To maintain the V OUT = V REF /2 relationship, the resistor in
series with the V REF pin should be made twice as large as
the resistor in series with the V FB pin.
R FB
249k
When the voltage on RUN/SS reaches 1.5V, the LTC3717-
1 begins operating with a clamp on I TH of approximately
0.9V. As the RUN/SS voltage rises to 3V, the clamp on I TH
is raised until its full 2.4V range is available. This takes an
additional 1.3s/ μ F, during which the load current is folded
V OUT
V FB
back. During start-up, the maximum load current is re-
V REF
R FB
499k
LTC3717-1
V REF
37171 F04
duced until either the RUN/SS pin rises to 3V or the output
reaches 75% of its final value. The pin can be driven from
logic as shown in Figure 6. Diode D1 reduces the start
delay while allowing C SS to charge up slowly for the soft-
Figure 4
start function.
INTV CC
External Gate Drive Buffers
The LTC3717-1 drivers are adequate for driving up to
about 30nC into MOSFET switches with RMS currents of
3.3V OR 5V
D1
V IN
RUN/SS
R SS *
R SS *
D2*
RUN/SS
50mA. Applications with larger MOSFET switches or oper-
ating at frequencies requiring greater RMS currents will
benefit from using external gate drive buffers such as the
LTC1693. Alternately, the external buffer circuit shown in
Figure 5 can be used. Note that the bipolar devices reduce
(6a)
C SS
C SS
37171 F06
*OPTIONAL TO OVERRIDE
OVERCURRENT LATCHOFF
(6b)
the signal swing at the MOSFET gate.
Figure 6. RUN/SS Pin Interfacing with Latchoff Defeated
sn37171 37171fs
13
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