参数资料
型号: LTC3775IUD#TRPBF
厂商: Linear Technology
文件页数: 4/34页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 16-QFN
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1MHz
占空比: 80%
电源电压: 4.5 V ~ 38 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3775
ELECTRICAL CHARACTERISTICS The l denotes the speci?cations which apply over the full operating
junction temperature range, otherwise speci?cations are at T A = 25°C (Note 2). V IN = 12V, V RUN = 5V, unless otherwise speci?ed.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Oscillator
f OSC
Oscillator Frequency
R SET = 39.2k
l
425
500
575
kHz
f HIGH
f LOW
Maximum Oscillator Frequency
Minimum Oscillator Frequency
l
l
1000
250
kHz
kHz
f SYNC
t ON(MIN)
t OFF(MIN)
External Sync Frequency Range
TG Minimum On-Time
TG Minimum Off-Time
With Reference to Free Running
(Notes 6, 8) V MODE/SYNC = 0V
(Note 6)
–20
30
300
20
%
ns
ns
DC MAX
V MODE
V MODE(HYST)
R MODE/SYNC
Maximum TG Duty Cycle
MODE/SYNC Threshold
MODE/SYNC Hysteresis
MODE/SYNC Input Resistance to SGND
f OSC = 500kHz
MODE/SYNC Rising
l
90
1.2
430
50
%
V
mV
Driver
BG R UP
TG R UP
BG R DOWN
TG R DOWN
Bottom Gate (BG) Pull-Up On-Resistance
Top Gate (TG) Pull-Up On-Resistance
Bottom Gate (BG) Pull-Down On-Resistance
Top Gate (TG) Pull-Down On-Resistance
2.5
2.5
1.0
1.5
Ω
Ω
Ω
Ω
BG, TG t 2D
Bottom Gate Off to Top Gate On Delay
C L = 3300pF (Note 7)
15
ns
Top Switch-On Delay Time
TG, BG t 1D
Top Gate Off to Bottom Gate On Delay
C L = 3300pF (Note 7)
15
ns
Synchronous Switch-On Delay Time
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3775 is tested under pulsed load conditions such that T J ≈ T A .
The LTC3775E is guaranteed to meet speci?cations from 0°C to 85°C
junction temperature. Speci?cations over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3775I is guaranteed
over the –40°C to 125°C operating junction temperature range. Note that
the maximum ambient temperature consistent with these speci?cations
is determined by speci?c operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
The junction temperature (T J , in °C) is calculated from the ambient
Note 3: Failure to solder the exposed pad of the UD package to the PC
board will result in a thermal resistance much higher than 68°C/W.
Note 4: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
speci?ed.
Note 5: Supply current in normal operation is dominated by the current
needed to charge and discharge the external MOSFET gates. This current
will vary with supply voltage and the external MOSFETs used.
Note 6: Guaranteed by design, not subject to test.
Note 7: Rise and fall times are measured using 10% and 90% levels. Delay
and nonoverlap times are measured using 50% levels.
Note 8: The LTC3775 leading edge modulation architecture does not have
a minimum TG pulse width requirement. The TG minimum pulse width is
limited by the SW node rise and fall times.
temperature (T A , in °C) and power dissipation (P D , in Watts) according to
the formula:
T J = T A + (P D ? θ JA ), where θ JA (in °C/W) is the package thermal
impedance.
3775fa
4
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