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参数资料
| 型号： | LTC3802EUH#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 25/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 32-QFN |
| 标准包装： | 73 |
| 系列： | PolyPhase® |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 850kHz |
| 占空比： | 92% |
| 电源电压： | 3 V ~ 30 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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LTC3802
APPLICATIO S I FOR ATIO
or Kool M μ ? cores. A variety of inductors designed for high
current, low voltage applications are available from manu-
facturers such as Sumida, Panasonic, Coiltronics, Coil-
craft and Toko.
PC Board Layout Checklist
When laying out the printed circuit board, start with the
power device. Be sure to orient the power circuitry so that
a clean power flow path is achieved. Conductor widths
should be maximized and lengths minimized. After you are
satisfied with the power path, the control circuitry should
be laid out. It is much easier to find routes for the relatively
small traces in the control circuits than it is to find
circuitous routes for high current paths. After the layout,
the following checklist should be used to ensure proper
operation of the LTC3802.
1. Place the top N-channel MOSFETs QT1 and QT2 within
1cm of each other with a common drain connection at
C IN . Do not attempt to split the input decoupling for the
two channels because doing so can create a resonant
loop.
2. Place C IN , C OUT , the MOSFETs, Schottky diode and the
inductor together in one compact area.
3. Split the signal and power grounds. The path formed by
the top and bottom N-channel MOSFETs, Schottky
diode, and the C IN capacitor should have short leads
and PC trace lengths. The output capacitor (–) termi-
nals should be connected as close as possible to the (–
) terminals of the input capacitor by placing the capacitors
next to each other. The combined LTC3802 signal
ground pin and the ground return of C VCC must return
to the combined C OUT (–) terminals. Use a modified
“star ground” technique: a low impedance, large cop-
per area central grounding point on the same side of the
PC board as the input and output capacitors, with tie-ins
for the bottom of the V CC decoupling capacitor, the
bottom of the voltage feedback resistive divider and the
SGND pin of the IC.
4. Keep the switching nodes (SW1, SW2), top gate nodes
(TG1, TG2), and boost nodes (BOOST1, BOOST2)
away from sensitive small-signal nodes, especially
from the opposite channel’s voltage and current sens-
ing feedback pins. All of these nodes have very large
and fast moving signals and therefore should be kept on
the “output side” of the LTC3802 and occupy minimum
PC trace area.
5. Reduce the parasitic inductance at the SW and PGND
connections to allow proper Burst Mode operation. Use
multiple vias if possible.
6. Use the same resistor values for the FB and CMPIN
resistive divider. Connect these dividers to the same
node: the (+) terminals of C OUT and signal ground. The
dividers should be connected to a node away from any
high current path.
7. Place the V CC and PV CC decoupling capacitor close to
the IC, between the V CC and the signal ground, and
between PV CC and PGND. The V CC capacitor provides a
quiet supply for the sensitive analog circuits and the
PV CC capacitor carries the MOSFET drivers current
peaks. An additional 1 μ F ceramic capacitor placed
immediately next to the V CC and SGND pins can sub-
stantially improve noise performance.
Checking Transient Response
For all new LTC3802 PCB circuits, transient tests need to
be performed to verify the proper feedback loop operation.
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, V OUT shifts by an
amount equal to ? I LOAD ? (ESR), where ESR is the effective
series resistance of C OUT . ? I LOAD also begins to charge or
discharge C OUT generating the feedback error signal that
forces the regulator to adapt to the current change and
return V OUT to its steady-state value. During this recovery
time, V OUT can be monitored for excessive overshoot or
ringing which would indicate a stability problem.
Measuring transient response presents a challenge in two
respects: obtaining an accurate measurement and gener-
ating a suitable transient for testing the circuit. Output
measurements should be taken with a scope probe di-
rectly across the output capacitor. Proper high frequency
probing techniques should be used. Do not use the 6"
ground lead that comes with the probe! Use an adapter
that fits on the tip of the probe and has a short ground clip
Kool M μ is a registered trademark of Magnetics, Inc.
3802f
25
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