参数资料
型号: LTC3802EUH#PBF
厂商: Linear Technology
文件页数: 3/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 32-QFN
标准包装: 73
系列: PolyPhase®
PWM 型: 电压模式
输出数: 2
频率 - 最大: 850kHz
占空比: 92%
电源电压: 3 V ~ 30 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-WFQFN 裸露焊盘
包装: 管件
LTC3802
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply over the full operating
temperature range. (Note 3) V CC = PV CC = BOOST = 5V, unless otherwise specified.
SYMBOL
I PVCC
I BOOST
PARAMETER
PV CC Supply Current
BOOST Pin Current
CONDITIONS
V FB = V CMPIN = 0V, No Load
V RUN/SS = 0V (Notes 5, 6)
V FB = V CMPIN = 0V, No Load
V RUN/SS = 0V (Notes 5, 6)
MIN
TYP
2
1
1
1
MAX
10
10
UNITS
mA
μ A
mA
μ A
Switcher Control Loop
V FB
? V FB
? V OUT
Feedback Voltage
Feedback Voltage V CC Line Regulation
Output Voltage Load Regulation
V EXTREF = 5V, 0 ° C ≤ T ≤ 70 ° C
V EXTREF = 5V
V CC = 4.5V to 6V
(Note 7)
q
0.594
0.591
0.600
0.600
± 0.01
0.1
0.606
0.609
± 0.2
V
V
%/V
%
A ERR
GBW
I COMP
I FB
I CMPIN
I FBT
I EXTREF
Error AMP DC Gain
Error AMP Gain Bandwidth Product
Error AMP Output Sink/Source Current
Voltage Feedback Input Current
Comparators Input Current
FBT Input Current
EXTREF Input Current
No Load, V EXTREF = V RUN/SS = V CC
f = 100kHz (Note 7)
V RUN/SS = V CC
V FB = 0V to 1V
V CMPIN = 0V to 1V
V FBT = 0V to 1V
V EXTREF = 0V to 5V
q
q
q
q
q
70
80
10
± 12
± 1
± 1
± 1
± 1
dB
MHz
mA
μ A
μ A
μ A
μ A
V EXTREF
A LFF
R VINFF
External Reference Not to Affect V FB
? Drop in Duty Cycle/ ? V INFF
V INFF Input Resistance
V VINFF = 5V to 30V
q
1
2.3
1
V
%/V
M ?
V PGOOD
V OVP
Positive Power Good Threshold
Negative Power Good Threshold
Overvoltage Threshold
With Respect to 0.6V
With Respect to 0.6V
With Respect to V FB
q
q
5
–5
3
10
–10
5
15
–15
9
%
%
%
V BURRS
V SAW
(V CMPIN – V FB ) to Reset
Burst Mode Operation
SAW Before Line Compensation
15
–12
1.2
mV
mV
V
I IMAX
I LIM(TH)
I MAX Source Current
I LIM Comparator Offset
V IMAX = 1V
q
q
–9.0
–8.5
–15
–10
–10
0
–11.0
–11.5
15
μ A
μ A
mV
V IMAX /I LIM Threshold
5
V/V
Hard I LIM /I LIM Threshold
V CMPIN = 0V
1.5
V/V
I SS
RUN/SS Source Current
RUN/SS Sink/Source Current Ratio
RUN/SS Sink Current, I LIM
RUN/SS Sink Current, Hard I LIM
V CMPIN = V FBT = 0.6V, V PHASEMD = V CC
V CMPIN = V FBT = 0.6V, V PHASEMD = 0V
V CMPIN = V FBT = 0.6V
V CMPIN = V FBT = 0V
q
–5
1.5
1
–7
2
100
–9
2.5
μ A
μ A/ μ A
μ A
mA
V SHDN
RUN/SS Shutdown Threshold
RUN/SS ↑
q
0.4
0.8
1.2
V
LOGIC and PGOOD
I PHASEMD
V IH
V IL
I PGOOD
PHASEMD Pull-Up Current
PHASEMD Pull-Down Current
PLLIN, FCB High Level Input Voltage
PLLIN, FCB Low Level Input Voltage
V PGOOD Leakage Current
V PHASEMD = 0V
V PHASEMD = 5V
Power Good
q
q
2.4
–7
2
0.8
± 1
μ A
μ A
V
V
μ A
V OLPG
V PGOOD Output Low Voltage
I PGOOD = 1mA
q
0.1
0.3
V
t PGOOD
V PGOOD Falling Edge Delay
V PGOOD Rising Edge Delay
(Note 8)
(Note 8)
q
100
150
10
μ s
μ s
3802f
3
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