参数资料
型号: LTC3826IUH#TRPBF
厂商: Linear Technology
文件页数: 18/36页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 32-QFN
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 585kHz
占空比: 99.4%
电源电压: 4 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3826
APPLICATIONS INFORMATION
The term (1 + δ ) is generally given for a MOSFET in the
form of a normalized R DS(ON) vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diodes D3 and D4 shown in Figure 14
conduct during the dead-time between the conduction of
the two power MOSFETs. This prevents the body diode of
the bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period that
could cost as much as 3% in ef?ciency at high V IN . A 1A
to 3A Schottky is generally a good compromise for both
regions of operation due to the relatively small average
current. Larger diodes result in additional transition losses
due to their larger junction capacitance.
C IN and C OUT Selection
The selection of C IN is simpli?ed by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can be
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (V OUT )(I OUT ) product needs to be used in the
formula below to determine the maximum RMS capacitor
current requirement. Increasing the output current drawn
from the other controller will actually decrease the input
RMS ripple current from its maximum value. The out-of-
phase technique typically reduces the input capacitor’s RMS
ripple current by a factor of 30% to 70% when compared
to a single phase power supply solution.
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V OUT )/(V IN ). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3826, ceramic capacitors
can also be used for C IN . Always consult the manufacturer
if there is any question.
The bene?t of the LTC3826 2-phase operation can be cal-
culated by using the equation above for the higher power
controller and then calculating the loss that would have
resulted if both controller channels switched on at the same
time. The total RMS power lost is lower when both control-
lers are operating due to the reduced overlap of current
pulses required through the input capacitor’s ESR. This is
why the input capacitor’s requirement calculated above for
the worst-case controller is adequate for the dual controller
design. Also, the input protection fuse resistance, battery
resistance, and PC board trace resistance losses are also
reduced due to the reduced peak currents in a 2-phase
system. The overall bene?t of a multiphase design will
only be fully realized when the source impedance of the
power supply/battery is included in the ef?ciency testing.
The sources of the top MOSFETs should be placed within
1cm of each other and share a common C IN (s). Separating
the sources and C IN may produce undesirable voltage and
current resonances at V IN .
A small (0.1μF to 1μF) bypass capacitor between the chip V IN
pin and ground, placed close to the LTC3826, is also sug-
gested. A 10Ω resistor placed between C IN (C1) and the V IN
pin provides further isolation between the two channels.
The selection of C OUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
C IN ?Required?I RMS
I MAX
V IN
( V OUT ) ( V IN – V OUT )
1/2
is satis?ed, the capacitance is adequate for ?ltering. The
output ripple ( Δ V OUT ) is approximated by:
This formula has a maximum at V IN = 2V OUT , where I RMS
= I OUT /2. This simple worst-case condition is commonly
V OUT
I RIPPLE ESR +
1
8fC OUT
used for design because even signi?cant deviations do not
3826fc
18
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