参数资料
型号: LTC3828EUH#TRPBF
厂商: Linear Technology
文件页数: 22/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 32-QFN
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 590kHz
占空比: 99.4%
电源电压: 4.5 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3828
APPLICATIONS INFORMATION
The resistive load reduces the DC loop gain while main-
taining the linear control range of the error ampli?er.
The maximum output voltage deviation can theoretically
be reduced to half or alternatively the amount of output
capacitance can be reduced for a particular application. A
complete explanation is included in Design Solutions 10.
(See www.linear.com)
Ef?ciency Considerations
The percent ef?ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the ef?ciency and which change would
produce the most improvement. Percent ef?ciency can
be expressed as:
%Ef?ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
mode the average output current ?ows through L and
R SENSE , but is “chopped” between the topside MOSFET
and the synchronous MOSFET. If the two MOSFETs have
approximately the same R DS(ON) , then the resistance of
one MOSFET can simply be summed with the resistances
of L, R SENSE and ESR to obtain I 2 R losses. For example, if
each R DS(ON) = 30mΩ, R L = 50mΩ, R SENSE = 10mΩ and
R ESR = 40mΩ (sum of both input and output capacitance
losses), then the total resistance is 130mΩ. This results
in losses ranging from 3% to 13% as the output current
increases from 1A to 5A for a 5V output, or a 4% to 20%
loss for a 3.3V output. Ef?ciency varies as the inverse
square of V OUT for the same external components and
output power level. The combined effects of increasingly
lower output voltages and higher currents required by
high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switching
regulator system!
4. Transition losses apply only to the topside MOSFET(s),
and become signi?cant only when operating at high input
voltages (typically 15V or greater). Transition losses can
( )
( )
? ? MAX ? R DR ?
(
)( )
C MILLER f ?
V TH ?
losses in LTC3828 circuits: 1) IC V IN current, 2) INTV CC
regulator current, 3) I 2 R losses, 4) Topside MOSFET
transition losses.
1. The V IN current has two components: the ?rst is the DC
supply current given in the Electrical Characteristics table,
which excludes MOSFET driver and control currents; V IN
current typically results in a small (<0.1%) loss.
be estimated from:
Transition Loss = V IN
2 ? I ?
? 2 ?
? 1
? 5 V – V TH
+
1 ?
?
2. INTV CC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from INTV CC
to ground. The resulting dQ/dt is a current out of INTV CC
that is typically much larger than the control circuit current.
In continuous mode, I GATECHG =f(Q T + Q B ), where Q T and
Q B are the gate charges of the topside and bottom side
MOSFETs.
3. I 2 R losses are predicted from the DC resistances of
the fuse (if used), MOSFET, inductor, current sense resis-
tor, and input and output capacitor ESR. In continuous
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% ef?ciency degradation in portable systems. It is very
important to include these “system” level losses during
the design phase. The internal battery and fuse resistance
losses can be minimized by making sure that C IN has ad-
equate charge storage and very low ESR at the switching
frequency. A 25W supply will typically require a minimum of
20μF to 40μF of capacitance having a maximum of 20mΩ to
50mΩ of ESR. The LTC3828 2-phase architecture typically
halves this input capacitance requirement over competing
solutions. Other losses including Schottky conduction
losses during dead-time and inductor core losses generally
account for less than 2% total additional loss.
3828fc
22
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