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参数资料
| 型号： | LTC3833IUDC#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/36页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 20-QFN |
| 标准包装： | 91 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 2.2MHz |
| 电源电压： | 4.5 V ~ 38 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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LTC3833
PIN FUNCTIONS
(FE/UDC)
PGOOD (Pin 1/Pin 17): Power Good Indicator Output.
This open-drain logic output is pulled to ground when
the output voltage is outside of a ±7.5% window around
the regulation point.
SENSE + (Pin 2/Pin 18): Differential Current Sensing (+)
Input. For R SENSE current sensing, Kelvin (4-wire) connect
SENSE + and SENSE – pins across the sense resistor. For
DCR sensing, Kelvin connect SENSE + and SENSE – pins
across the sense filter capacitor.
SENSE – (Pin 3/Pin 19): Differential Current Sensing (–)
Input. For R SENSE current sensing, Kelvin (4-wire) connect
SENSE + and SENSE – pins across the sense resistor. For
DCR sensing, Kelvin connect SENSE + and SENSE – pins
across the sense filter capacitor.
V OUT (Pin 4/Pin 20): Output voltage sense for adjusting
the TG on-time for constant frequency operation. Tying
this pin to the local output (instead of remote output)
is recommended for most applications. This pin can be
programmed as needed for achieving the steady-state
on-time required for constant frequency operation.
V OSNS– (Pin 5/Pin 1): Differential Output Sensing (–)
Input. Connect this pin to the negative terminal of the
output capacitor. There is a bias current of 35μA (typical)
flowing out of this pin.
V OSNS+ (Pin 6/Pin 2): Differential Output Sensing (+) Input.
Connect this pin to the feedback resistor divider between
the positive and negative output capacitor terminals. In
nominal operation the LTC3833 will regulate the differen-
tial output voltage which is divided down to 0.6V by the
feedback resistor divider.
TRACK/SS (Pin 7/Pin 3): External Tracking and Soft-Start
Input. The LTC3833 regulates the differential feedback volt-
age (V OSNS+ ? V OSNS– ) to the smaller of 0.6V or the voltage
on the TRACK/SS pin. An internal 1.0μA pull-up current
source is connected to this pin. A capacitor to ground at
this pin sets the ramp time to the final regulated output
voltage. Alternatively, another voltage supply connected
through a resistor divider to this pin allows the output to
track the other supply during start-up.
ITH (Pin 8/Pin 4): Current Control Voltage and Switch-
ing Regulator Compensation Point. The current sense
threshold increases with this control voltage which ranges
from 0V to 2.4V.
V RNG (Pin 9/Pin 5): Current Sense Voltage Range Input.
The maximum allowed sense voltage between SENSE + and
SENSE – is equal to 0.05 ? V RNG . If V RNG is tied to SGND,
the device operates with a maximum sense voltage of
30mV. If V RNG is tied to INTV CC , the device operates with
a maximum sense voltage of 50mV.
RT (Pin 10/Pin 6): Switching Frequency Programming Pin.
Connect an external resistor from RT to signal ground to
program the switching frequency between 200kHz and
2MHz. An external clock applied to MODE/PLLIN must
be within ±30% of this free-running frequency to ensure
frequency lock.
RUN (Pin 11/Pin 7): Digital Run Control Input. RUN self
biases high with an internal 1.3μA pull-up. Forcing RUN
below 1.2V turns off TG and BG. Taking RUN below 0.75V
shuts down all bias and places the LTC3833 into micropower
shutdown mode of approximately 15μA.
EXTV CC (Pin 12/Pin 8): External V CC Input. When EXT-
V CC exceeds 4.6V, an internal switch connects this pin to
INTV CC and shuts down the internal regulator so that the
controller and gate drive power is drawn from EXTV CC .
EXTV CC should not exceed V IN .
MODE/PLLIN (Pin 13/Pin 9): External Clock Synchroniza-
tion Input and/or Forced Continuous Mode Input. When an
external clock is applied to this pin, the rising TG signal will
be synchronized with the rising edge of the external clock.
Additionally, this pin determines operation under light load
conditions. When either a clock input is detected or MODE/
PLLIN is tied to INTV CC , forced continuous mode operation
is selected. Tying this pin to SGND allows discontinuous
pulse-skipping mode operation at light loads.
3833f
8
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| LTC3834EDHC-1#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 16-DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,000 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:50% 电源电压:9 V ~ 10 V 降压:无 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:8-TSSOP（0.173"，4.40mm 宽） 包装:带卷 (TR) |
| LTC3834EDHC-1#TRPBF | 功能描述:IC REG CTRLR BUCK PWM CM 16-DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
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